Commit cd6e4c2f authored by Rodrigo Vivi's avatar Rodrigo Vivi
Browse files

Merge tag 'gvt-next-2022-01-12' of https://github.com/intel/gvt-linux into drm-intel-next 



gvt-next-2022-01-12

- Constify some pointers. (Rikard Falkeborn)
- Use list_entry to access list members. (Guenter Roeck)
- Fix cmd parser error for Passmark9. (Zhenyu Wang)

Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
From: "Wang, Zhi A" <zhi.a.wang@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f3076d7e-ff71-4882-8d72-fcc577a882cb@intel.com
parents 43571e15 3f8bd465

drivers/gpu/drm/i915/gvt/cmd_parser.c

+1 −1
Original line number Diff line number Diff line
@@ -1145,7 +1145,7 @@ struct cmd_interrupt_event { 
	int mi_user_interrupt;

};



static struct cmd_interrupt_event cmd_interrupt_events[] = {

static const struct cmd_interrupt_event cmd_interrupt_events[] = {

	[RCS0] = {

		.pipe_control_notify = RCS_PIPE_CONTROL,

		.mi_flush_dw = INTEL_GVT_EVENT_RESERVED,

drivers/gpu/drm/i915/gvt/dmabuf.c

+5 −13
Original line number Diff line number Diff line
@@ -148,8 +148,7 @@ static void dmabuf_gem_object_free(struct kref *kref) 


	if (vgpu && vgpu->active && !list_empty(&vgpu->dmabuf_obj_list_head)) {

		list_for_each(pos, &vgpu->dmabuf_obj_list_head) {

			dmabuf_obj = container_of(pos,

					struct intel_vgpu_dmabuf_obj, list);

			dmabuf_obj = list_entry(pos, struct intel_vgpu_dmabuf_obj, list);

			if (dmabuf_obj == obj) {

				list_del(pos);

				intel_gvt_hypervisor_put_vfio_device(vgpu);
@@ -357,10 +356,8 @@ pick_dmabuf_by_info(struct intel_vgpu *vgpu, 
	struct intel_vgpu_dmabuf_obj *ret = NULL;



	list_for_each(pos, &vgpu->dmabuf_obj_list_head) {

		dmabuf_obj = container_of(pos, struct intel_vgpu_dmabuf_obj,

						list);

		if ((dmabuf_obj == NULL) ||

		    (dmabuf_obj->info == NULL))

		dmabuf_obj = list_entry(pos, struct intel_vgpu_dmabuf_obj, list);

		if (!dmabuf_obj->info)

			continue;



		fb_info = (struct intel_vgpu_fb_info *)dmabuf_obj->info;
@@ -387,11 +384,7 @@ pick_dmabuf_by_num(struct intel_vgpu *vgpu, u32 id) 
	struct intel_vgpu_dmabuf_obj *ret = NULL;



	list_for_each(pos, &vgpu->dmabuf_obj_list_head) {

		dmabuf_obj = container_of(pos, struct intel_vgpu_dmabuf_obj,

						list);

		if (!dmabuf_obj)

			continue;



		dmabuf_obj = list_entry(pos, struct intel_vgpu_dmabuf_obj, list);

		if (dmabuf_obj->dmabuf_id == id) {

			ret = dmabuf_obj;

			break;
@@ -600,8 +593,7 @@ void intel_vgpu_dmabuf_cleanup(struct intel_vgpu *vgpu) 


	mutex_lock(&vgpu->dmabuf_lock);

	list_for_each_safe(pos, n, &vgpu->dmabuf_obj_list_head) {

		dmabuf_obj = container_of(pos, struct intel_vgpu_dmabuf_obj,

						list);

		dmabuf_obj = list_entry(pos, struct intel_vgpu_dmabuf_obj, list);

		dmabuf_obj->vgpu = NULL;



		idr_remove(&vgpu->object_idr, dmabuf_obj->dmabuf_id);

drivers/gpu/drm/i915/gvt/fb_decoder.c

+12 −12
Original line number Diff line number Diff line
@@ -42,10 +42,10 @@ 
struct pixel_format {

	int drm_format;	/* Pixel format in DRM definition */

	int bpp; /* Bits per pixel, 0 indicates invalid */

	char	*desc;		/* The description */

	const char *desc; /* The description */

};



static struct pixel_format bdw_pixel_formats[] = {

static const struct pixel_format bdw_pixel_formats[] = {

	{DRM_FORMAT_C8, 8, "8-bit Indexed"},

	{DRM_FORMAT_RGB565, 16, "16-bit BGRX (5:6:5 MSB-R:G:B)"},

	{DRM_FORMAT_XRGB8888, 32, "32-bit BGRX (8:8:8:8 MSB-X:R:G:B)"},
@@ -58,7 +58,7 @@ static struct pixel_format bdw_pixel_formats[] = { 
	{0, 0, NULL},

};



static struct pixel_format skl_pixel_formats[] = {

static const struct pixel_format skl_pixel_formats[] = {

	{DRM_FORMAT_YUYV, 16, "16-bit packed YUYV (8:8:8:8 MSB-V:Y2:U:Y1)"},

	{DRM_FORMAT_UYVY, 16, "16-bit packed UYVY (8:8:8:8 MSB-Y2:V:Y1:U)"},

	{DRM_FORMAT_YVYU, 16, "16-bit packed YVYU (8:8:8:8 MSB-U:Y2:V:Y1)"},
@@ -282,10 +282,10 @@ struct cursor_mode_format { 
	u8 bpp; /* Bits per pixel; 0 indicates invalid */

	u32 width; /* In pixel */

	u32 height; /* In lines */

	char	*desc;		/* The description */

	const char *desc; /* The description */

};



static struct cursor_mode_format cursor_pixel_formats[] = {

static const struct cursor_mode_format cursor_pixel_formats[] = {

	{DRM_FORMAT_ARGB8888, 32, 128, 128, "128x128 32bpp ARGB"},

	{DRM_FORMAT_ARGB8888, 32, 256, 256, "256x256 32bpp ARGB"},

	{DRM_FORMAT_ARGB8888, 32, 64, 64, "64x64 32bpp ARGB"},
@@ -391,7 +391,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, 


#define SPRITE_FORMAT_NUM	(1 << 3)



static struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {

static const struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = {

	[0x0] = {DRM_FORMAT_YUV422, 16, "YUV 16-bit 4:2:2 packed"},

	[0x1] = {DRM_FORMAT_XRGB2101010, 32, "RGB 32-bit 2:10:10:10"},

	[0x2] = {DRM_FORMAT_XRGB8888, 32, "RGB 32-bit 8:8:8:8"},

drivers/gpu/drm/i915/gvt/gtt.c

+34 −34
Original line number Diff line number Diff line
@@ -185,7 +185,7 @@ struct gtt_type_table_entry { 
		.pse_entry_type = pse_type, \

	}



static struct gtt_type_table_entry gtt_type_table[] = {

static const struct gtt_type_table_entry gtt_type_table[] = {

	GTT_TYPE_TABLE_ENTRY(GTT_TYPE_PPGTT_ROOT_L4_ENTRY,

			GTT_TYPE_PPGTT_ROOT_L4_ENTRY,

			GTT_TYPE_INVALID,
@@ -499,7 +499,7 @@ DEFINE_PPGTT_GMA_TO_INDEX(gen8, l3_pdp, (gma >> 30 & 0x3)); 
DEFINE_PPGTT_GMA_TO_INDEX(gen8, l4_pdp, (gma >> 30 & 0x1ff));

DEFINE_PPGTT_GMA_TO_INDEX(gen8, pml4, (gma >> 39 & 0x1ff));



static struct intel_gvt_gtt_pte_ops gen8_gtt_pte_ops = {

static const struct intel_gvt_gtt_pte_ops gen8_gtt_pte_ops = {

	.get_entry = gtt_get_entry64,

	.set_entry = gtt_set_entry64,

	.clear_present = gtt_entry_clear_present,
@@ -516,7 +516,7 @@ static struct intel_gvt_gtt_pte_ops gen8_gtt_pte_ops = { 
	.set_pfn = gen8_gtt_set_pfn,

};



static struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops = {

static const struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops = {

	.gma_to_ggtt_pte_index = gma_to_ggtt_pte_index,

	.gma_to_pte_index = gen8_gma_to_pte_index,

	.gma_to_pde_index = gen8_gma_to_pde_index,
@@ -526,7 +526,7 @@ static struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops = { 
};



/* Update entry type per pse and ips bit. */

static void update_entry_type_for_real(struct intel_gvt_gtt_pte_ops *pte_ops,

static void update_entry_type_for_real(const struct intel_gvt_gtt_pte_ops *pte_ops,

	struct intel_gvt_gtt_entry *entry, bool ips)

{

	switch (entry->type) {
@@ -553,7 +553,7 @@ static void _ppgtt_get_root_entry(struct intel_vgpu_mm *mm, 
		struct intel_gvt_gtt_entry *entry, unsigned long index,

		bool guest)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;



	GEM_BUG_ON(mm->type != INTEL_GVT_MM_PPGTT);
@@ -580,7 +580,7 @@ static void _ppgtt_set_root_entry(struct intel_vgpu_mm *mm, 
		struct intel_gvt_gtt_entry *entry, unsigned long index,

		bool guest)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;



	pte_ops->set_entry(guest ? mm->ppgtt_mm.guest_pdps :

			   mm->ppgtt_mm.shadow_pdps,
@@ -596,7 +596,7 @@ static inline void ppgtt_set_shadow_root_entry(struct intel_vgpu_mm *mm, 
static void ggtt_get_guest_entry(struct intel_vgpu_mm *mm,

		struct intel_gvt_gtt_entry *entry, unsigned long index)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;



	GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -608,7 +608,7 @@ static void ggtt_get_guest_entry(struct intel_vgpu_mm *mm, 
static void ggtt_set_guest_entry(struct intel_vgpu_mm *mm,

		struct intel_gvt_gtt_entry *entry, unsigned long index)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;



	GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -619,7 +619,7 @@ static void ggtt_set_guest_entry(struct intel_vgpu_mm *mm, 
static void ggtt_get_host_entry(struct intel_vgpu_mm *mm,

		struct intel_gvt_gtt_entry *entry, unsigned long index)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;



	GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -629,7 +629,7 @@ static void ggtt_get_host_entry(struct intel_vgpu_mm *mm, 
static void ggtt_set_host_entry(struct intel_vgpu_mm *mm,

		struct intel_gvt_gtt_entry *entry, unsigned long index)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops;

	unsigned long offset = index;



	GEM_BUG_ON(mm->type != INTEL_GVT_MM_GGTT);
@@ -655,7 +655,7 @@ static inline int ppgtt_spt_get_entry( 
		bool guest)

{

	struct intel_gvt *gvt = spt->vgpu->gvt;

	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	int ret;



	e->type = get_entry_type(type);
@@ -684,7 +684,7 @@ static inline int ppgtt_spt_set_entry( 
		bool guest)

{

	struct intel_gvt *gvt = spt->vgpu->gvt;

	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;



	if (WARN(!gtt_type_is_entry(e->type), "invalid entry type\n"))

		return -EINVAL;
@@ -947,7 +947,7 @@ static int ppgtt_invalidate_spt_by_shadow_entry(struct intel_vgpu *vgpu, 
		struct intel_gvt_gtt_entry *e)

{

	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	struct intel_vgpu_ppgtt_spt *s;

	enum intel_gvt_gtt_type cur_pt_type;
@@ -984,7 +984,7 @@ static inline void ppgtt_invalidate_pte(struct intel_vgpu_ppgtt_spt *spt, 
		struct intel_gvt_gtt_entry *entry)

{

	struct intel_vgpu *vgpu = spt->vgpu;

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	unsigned long pfn;

	int type;
@@ -1072,7 +1072,7 @@ static int ppgtt_populate_spt(struct intel_vgpu_ppgtt_spt *spt); 
static struct intel_vgpu_ppgtt_spt *ppgtt_populate_spt_by_guest_entry(

		struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *we)

{

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	struct intel_vgpu_ppgtt_spt *spt = NULL;

	bool ips = false;

	int ret;
@@ -1136,7 +1136,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_populate_spt_by_guest_entry( 
static inline void ppgtt_generate_shadow_entry(struct intel_gvt_gtt_entry *se,

		struct intel_vgpu_ppgtt_spt *s, struct intel_gvt_gtt_entry *ge)

{

	struct intel_gvt_gtt_pte_ops *ops = s->vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = s->vgpu->gvt->gtt.pte_ops;



	se->type = ge->type;

	se->val64 = ge->val64;
@@ -1159,7 +1159,7 @@ static inline void ppgtt_generate_shadow_entry(struct intel_gvt_gtt_entry *se, 
static int is_2MB_gtt_possible(struct intel_vgpu *vgpu,

	struct intel_gvt_gtt_entry *entry)

{

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	unsigned long pfn;



	if (!HAS_PAGE_SIZES(vgpu->gvt->gt->i915, I915_GTT_PAGE_SIZE_2M))
@@ -1176,7 +1176,7 @@ static int split_2MB_gtt_entry(struct intel_vgpu *vgpu, 
	struct intel_vgpu_ppgtt_spt *spt, unsigned long index,

	struct intel_gvt_gtt_entry *se)

{

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	struct intel_vgpu_ppgtt_spt *sub_spt;

	struct intel_gvt_gtt_entry sub_se;

	unsigned long start_gfn;
@@ -1223,7 +1223,7 @@ static int split_64KB_gtt_entry(struct intel_vgpu *vgpu, 
	struct intel_vgpu_ppgtt_spt *spt, unsigned long index,

	struct intel_gvt_gtt_entry *se)

{

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	struct intel_gvt_gtt_entry entry = *se;

	unsigned long start_gfn;

	dma_addr_t dma_addr;
@@ -1254,7 +1254,7 @@ static int ppgtt_populate_shadow_entry(struct intel_vgpu *vgpu, 
	struct intel_vgpu_ppgtt_spt *spt, unsigned long index,

	struct intel_gvt_gtt_entry *ge)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;

	struct intel_gvt_gtt_entry se = *ge;

	unsigned long gfn, page_size = PAGE_SIZE;

	dma_addr_t dma_addr;
@@ -1308,7 +1308,7 @@ static int ppgtt_populate_spt(struct intel_vgpu_ppgtt_spt *spt) 
{

	struct intel_vgpu *vgpu = spt->vgpu;

	struct intel_gvt *gvt = vgpu->gvt;

	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	struct intel_vgpu_ppgtt_spt *s;

	struct intel_gvt_gtt_entry se, ge;

	unsigned long gfn, i;
@@ -1351,7 +1351,7 @@ static int ppgtt_handle_guest_entry_removal(struct intel_vgpu_ppgtt_spt *spt, 
		struct intel_gvt_gtt_entry *se, unsigned long index)

{

	struct intel_vgpu *vgpu = spt->vgpu;

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	int ret;



	trace_spt_guest_change(spt->vgpu->id, "remove", spt,
@@ -1432,7 +1432,7 @@ static int sync_oos_page(struct intel_vgpu *vgpu, 
{

	const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;

	struct intel_gvt *gvt = vgpu->gvt;

	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	struct intel_vgpu_ppgtt_spt *spt = oos_page->spt;

	struct intel_gvt_gtt_entry old, new;

	int index;
@@ -1603,7 +1603,7 @@ static int ppgtt_handle_guest_write_page_table( 
{

	struct intel_vgpu *vgpu = spt->vgpu;

	int type = spt->shadow_page.type;

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	struct intel_gvt_gtt_entry old_se;

	int new_present;

	int i, ret;
@@ -1720,7 +1720,7 @@ static int ppgtt_handle_guest_write_page_table_bytes( 
		u64 pa, void *p_data, int bytes)

{

	struct intel_vgpu *vgpu = spt->vgpu;

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;

	struct intel_gvt_gtt_entry we, se;

	unsigned long index;
@@ -1785,7 +1785,7 @@ static void invalidate_ppgtt_mm(struct intel_vgpu_mm *mm) 
	struct intel_vgpu *vgpu = mm->vgpu;

	struct intel_gvt *gvt = vgpu->gvt;

	struct intel_gvt_gtt *gtt = &gvt->gtt;

	struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;

	struct intel_gvt_gtt_entry se;

	int index;
@@ -1815,7 +1815,7 @@ static int shadow_ppgtt_mm(struct intel_vgpu_mm *mm) 
	struct intel_vgpu *vgpu = mm->vgpu;

	struct intel_gvt *gvt = vgpu->gvt;

	struct intel_gvt_gtt *gtt = &gvt->gtt;

	struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = gtt->pte_ops;

	struct intel_vgpu_ppgtt_spt *spt;

	struct intel_gvt_gtt_entry ge, se;

	int index, ret;
@@ -2067,7 +2067,7 @@ static inline int ppgtt_get_next_level_entry(struct intel_vgpu_mm *mm, 
		struct intel_gvt_gtt_entry *e, unsigned long index, bool guest)

{

	struct intel_vgpu *vgpu = mm->vgpu;

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	struct intel_vgpu_ppgtt_spt *s;



	s = intel_vgpu_find_spt_by_mfn(vgpu, ops->get_pfn(e));
@@ -2096,8 +2096,8 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma) 
{

	struct intel_vgpu *vgpu = mm->vgpu;

	struct intel_gvt *gvt = vgpu->gvt;

	struct intel_gvt_gtt_pte_ops *pte_ops = gvt->gtt.pte_ops;

	struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops;

	unsigned long gpa = INTEL_GVT_INVALID_ADDR;

	unsigned long gma_index[4];

	struct intel_gvt_gtt_entry e;
@@ -2221,7 +2221,7 @@ int intel_vgpu_emulate_ggtt_mmio_read(struct intel_vgpu *vgpu, unsigned int off, 
static void ggtt_invalidate_pte(struct intel_vgpu *vgpu,

		struct intel_gvt_gtt_entry *entry)

{

	struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;

	unsigned long pfn;



	pfn = pte_ops->get_pfn(entry);
@@ -2236,7 +2236,7 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, 
	struct intel_gvt *gvt = vgpu->gvt;

	const struct intel_gvt_device_info *info = &gvt->device_info;

	struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;

	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	unsigned long g_gtt_index = off >> info->gtt_entry_size_shift;

	unsigned long gma, gfn;

	struct intel_gvt_gtt_entry e = {.val64 = 0, .type = GTT_TYPE_GGTT_PTE};
@@ -2391,7 +2391,7 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu, 
{

	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;

	struct intel_vgpu_gtt *gtt = &vgpu->gtt;

	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;

	int page_entry_num = I915_GTT_PAGE_SIZE >>

				vgpu->gvt->device_info.gtt_entry_size_shift;

	void *scratch_pt;
@@ -2822,7 +2822,7 @@ void intel_vgpu_invalidate_ppgtt(struct intel_vgpu *vgpu) 
void intel_vgpu_reset_ggtt(struct intel_vgpu *vgpu, bool invalidate_old)

{

	struct intel_gvt *gvt = vgpu->gvt;

	struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;

	struct intel_gvt_gtt_entry entry = {.type = GTT_TYPE_GGTT_PTE};

	struct intel_gvt_gtt_entry old_entry;

	u32 index;

drivers/gpu/drm/i915/gvt/gtt.h

+2 −2
Original line number Diff line number Diff line
@@ -91,8 +91,8 @@ struct intel_gvt_gtt_gma_ops { 
};



struct intel_gvt_gtt {

	struct intel_gvt_gtt_pte_ops *pte_ops;

	struct intel_gvt_gtt_gma_ops *gma_ops;

	const struct intel_gvt_gtt_pte_ops *pte_ops;

	const struct intel_gvt_gtt_gma_ops *gma_ops;

	int (*mm_alloc_page_table)(struct intel_vgpu_mm *mm);

	void (*mm_free_page_table)(struct intel_vgpu_mm *mm);

	struct list_head oos_page_use_list_head;