Unverified Commit cd12d206 authored by Sunil V L's avatar Sunil V L Committed by Palmer Dabbelt
Browse files

clocksource/timer-riscv: Refactor riscv_timer_init_dt() 



Refactor the timer init function such that few things can be
shared by both DT and ACPI based platforms.

Co-developed-by: default avatarAnup Patel <apatel@ventanamicro.com>
Signed-off-by: default avatarAnup Patel <apatel@ventanamicro.com>
Signed-off-by: default avatarSunil V L <sunilvl@ventanamicro.com>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230515054928.2079268-18-sunilvl@ventanamicro.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 7023b9d8

drivers/clocksource/timer-riscv.c

+40 −41
Original line number Diff line number Diff line
@@ -124,61 +124,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id) 
	return IRQ_HANDLED;

}



static int __init riscv_timer_init_dt(struct device_node *n)

static int __init riscv_timer_init_common(void)

{

	int cpuid, error;

	unsigned long hartid;

	struct device_node *child;

	int error;

	struct irq_domain *domain;

	struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode();



	error = riscv_of_processor_hartid(n, &hartid);

	if (error < 0) {

		pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",

			n, hartid);

		return error;

	}



	cpuid = riscv_hartid_to_cpuid(hartid);

	if (cpuid < 0) {

		pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);

		return cpuid;

	}



	if (cpuid != smp_processor_id())

		return 0;



	child = of_find_compatible_node(NULL, NULL, "riscv,timer");

	if (child) {

		riscv_timer_cannot_wake_cpu = of_property_read_bool(child,

					"riscv,timer-cannot-wake-cpu");

		of_node_put(child);

	}



	domain = NULL;

	child = of_get_compatible_child(n, "riscv,cpu-intc");

	if (!child) {

		pr_err("Failed to find INTC node [%pOF]\n", n);

		return -ENODEV;

	}

	domain = irq_find_host(child);

	of_node_put(child);

	domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY);

	if (!domain) {

		pr_err("Failed to find IRQ domain for node [%pOF]\n", n);

		pr_err("Failed to find irq_domain for INTC node [%pfwP]\n",

		       intc_fwnode);

		return -ENODEV;

	}



	riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);

	if (!riscv_clock_event_irq) {

		pr_err("Failed to map timer interrupt for node [%pOF]\n", n);

		pr_err("Failed to map timer interrupt for node [%pfwP]\n", intc_fwnode);

		return -ENODEV;

	}



	pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",

	       __func__, cpuid, hartid);

	error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);

	if (error) {

		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",

		       error, cpuid);

		pr_err("RISCV timer registration failed [%d]\n", error);

		return error;

	}
@@ -207,4 +174,36 @@ static int __init riscv_timer_init_dt(struct device_node *n) 
	return error;

}



static int __init riscv_timer_init_dt(struct device_node *n)

{

	int cpuid, error;

	unsigned long hartid;

	struct device_node *child;



	error = riscv_of_processor_hartid(n, &hartid);

	if (error < 0) {

		pr_warn("Invalid hartid for node [%pOF] error = [%lu]\n",

			n, hartid);

		return error;

	}



	cpuid = riscv_hartid_to_cpuid(hartid);

	if (cpuid < 0) {

		pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);

		return cpuid;

	}



	if (cpuid != smp_processor_id())

		return 0;



	child = of_find_compatible_node(NULL, NULL, "riscv,timer");

	if (child) {

		riscv_timer_cannot_wake_cpu = of_property_read_bool(child,

					"riscv,timer-cannot-wake-cpu");

		of_node_put(child);

	}



	return riscv_timer_init_common();

}



TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);