Unverified Commit cd10bb89 authored by Martin Povišer's avatar Martin Povišer Committed by Mark Brown
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ASoC: tas2764: Add post reset delays 



Make sure there is at least 1 ms delay from reset to first command as
is specified in the datasheet. This is a fix similar to commit
307f3145 ("ASoC: tas2770: Insert post reset delay").

Fixes: 827ed8a0 ("ASoC: tas2764: Add the driver for the TAS2764")
Signed-off-by: default avatarMartin Povišer <povik+lin@cutebit.org>
Link: https://lore.kernel.org/r/20220630075135.2221-1-povik+lin@cutebit.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 94c65dff

sound/soc/codecs/tas2764.c

+8 −2
Original line number Diff line number Diff line
@@ -42,10 +42,12 @@ static void tas2764_reset(struct tas2764_priv *tas2764) 
		gpiod_set_value_cansleep(tas2764->reset_gpio, 0);

		msleep(20);

		gpiod_set_value_cansleep(tas2764->reset_gpio, 1);

		usleep_range(1000, 2000);

	}



	snd_soc_component_write(tas2764->component, TAS2764_SW_RST,

				TAS2764_RST);

	usleep_range(1000, 2000);

}



static int tas2764_set_bias_level(struct snd_soc_component *component,
@@ -107,8 +109,10 @@ static int tas2764_codec_resume(struct snd_soc_component *component) 
	struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);

	int ret;



	if (tas2764->sdz_gpio)

	if (tas2764->sdz_gpio) {

		gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);

		usleep_range(1000, 2000);

	}



	ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,

					    TAS2764_PWR_CTRL_MASK,
@@ -501,8 +505,10 @@ static int tas2764_codec_probe(struct snd_soc_component *component) 


	tas2764->component = component;



	if (tas2764->sdz_gpio)

	if (tas2764->sdz_gpio) {

		gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);

		usleep_range(1000, 2000);

	}



	tas2764_reset(tas2764);