Commit cd094335 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'perf-urgent-for-mingo-5.7-20200414' of... 

Merge tag 'perf-urgent-for-mingo-5.7-20200414' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux

 into perf/urgent

Pull perf/urgent fixes from Arnaldo Carvalho de Melo:

perf stat:

  Jin Yao:

  - Fix no metric header if --per-socket and --metric-only set

build system:

  - Fix python building when built with clang, that was failing if the clang
    version doesn't support -fno-semantic-interposition.

tools UAPI headers:

  Arnaldo Carvalho de Melo:

  - Update various copies of kernel headers, some ended up automatically
    updating build-time generated tables to enable tools such as 'perf trace'
    to decode syscalls and tracepoints arguments.

    Now the tools/perf build is free of UAPI drift warnings.

Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 00086336 e3698b23

tools/arch/x86/include/asm/cpufeatures.h

+4 −1
Original line number Diff line number Diff line
@@ -217,7 +217,7 @@ 
#define X86_FEATURE_IBRS		( 7*32+25) /* Indirect Branch Restricted Speculation */

#define X86_FEATURE_IBPB		( 7*32+26) /* Indirect Branch Prediction Barrier */

#define X86_FEATURE_STIBP		( 7*32+27) /* Single Thread Indirect Branch Predictors */

#define X86_FEATURE_ZEN			( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */

#define X86_FEATURE_ZEN			( 7*32+28) /* "" CPU is AMD family 0x17 or above (Zen) */

#define X86_FEATURE_L1TF_PTEINV		( 7*32+29) /* "" L1TF workaround PTE inversion */

#define X86_FEATURE_IBRS_ENHANCED	( 7*32+30) /* Enhanced IBRS */

#define X86_FEATURE_MSR_IA32_FEAT_CTL	( 7*32+31) /* "" MSR IA32_FEAT_CTL configured */
@@ -285,6 +285,7 @@ 
#define X86_FEATURE_CQM_MBM_LOCAL	(11*32+ 3) /* LLC Local MBM monitoring */

#define X86_FEATURE_FENCE_SWAPGS_USER	(11*32+ 4) /* "" LFENCE in user entry SWAPGS path */

#define X86_FEATURE_FENCE_SWAPGS_KERNEL	(11*32+ 5) /* "" LFENCE in kernel entry SWAPGS path */

#define X86_FEATURE_SPLIT_LOCK_DETECT	(11*32+ 6) /* #AC for split lock */



/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */

#define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
@@ -299,6 +300,7 @@ 
#define X86_FEATURE_AMD_IBRS		(13*32+14) /* "" Indirect Branch Restricted Speculation */

#define X86_FEATURE_AMD_STIBP		(13*32+15) /* "" Single Thread Indirect Branch Predictors */

#define X86_FEATURE_AMD_STIBP_ALWAYS_ON	(13*32+17) /* "" Single Thread Indirect Branch Predictors always-on preferred */

#define X86_FEATURE_AMD_PPIN		(13*32+23) /* Protected Processor Inventory Number */

#define X86_FEATURE_AMD_SSBD		(13*32+24) /* "" Speculative Store Bypass Disable */

#define X86_FEATURE_VIRT_SSBD		(13*32+25) /* Virtualized Speculative Store Bypass Disable */

#define X86_FEATURE_AMD_SSB_NO		(13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */
@@ -367,6 +369,7 @@ 
#define X86_FEATURE_INTEL_STIBP		(18*32+27) /* "" Single Thread Indirect Branch Predictors */

#define X86_FEATURE_FLUSH_L1D		(18*32+28) /* Flush L1D cache */

#define X86_FEATURE_ARCH_CAPABILITIES	(18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */

#define X86_FEATURE_CORE_CAPABILITIES	(18*32+30) /* "" IA32_CORE_CAPABILITIES MSR */

#define X86_FEATURE_SPEC_CTRL_SSBD	(18*32+31) /* "" Speculative Store Bypass Disable */



/*

tools/arch/x86/include/asm/msr-index.h

+9 −0
Original line number Diff line number Diff line
@@ -41,6 +41,10 @@ 


/* Intel MSRs. Some also available on other CPUs */



#define MSR_TEST_CTRL				0x00000033

#define MSR_TEST_CTRL_SPLIT_LOCK_DETECT_BIT	29

#define MSR_TEST_CTRL_SPLIT_LOCK_DETECT		BIT(MSR_TEST_CTRL_SPLIT_LOCK_DETECT_BIT)



#define MSR_IA32_SPEC_CTRL		0x00000048 /* Speculation Control */

#define SPEC_CTRL_IBRS			BIT(0)	   /* Indirect Branch Restricted Speculation */

#define SPEC_CTRL_STIBP_SHIFT		1	   /* Single Thread Indirect Branch Predictor (STIBP) bit */
@@ -70,6 +74,11 @@ 
 */

#define MSR_IA32_UMWAIT_CONTROL_TIME_MASK	(~0x03U)



/* Abbreviated from Intel SDM name IA32_CORE_CAPABILITIES */

#define MSR_IA32_CORE_CAPS			  0x000000cf

#define MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT_BIT  5

#define MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT	  BIT(MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT_BIT)



#define MSR_PKG_CST_CONFIG_CONTROL	0x000000e2

#define NHM_C3_AUTO_DEMOTE		(1UL << 25)

#define NHM_C1_AUTO_DEMOTE		(1UL << 26)

tools/include/linux/bits.h

+21 −3
Original line number Diff line number Diff line
@@ -3,9 +3,9 @@ 
#define __LINUX_BITS_H



#include <linux/const.h>

#include <vdso/bits.h>

#include <asm/bitsperlong.h>



#define BIT(nr)			(UL(1) << (nr))

#define BIT_ULL(nr)		(ULL(1) << (nr))

#define BIT_MASK(nr)		(UL(1) << ((nr) % BITS_PER_LONG))

#define BIT_WORD(nr)		((nr) / BITS_PER_LONG)
@@ -18,12 +18,30 @@ 
 * position @h. For example

 * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000.

 */

#define GENMASK(h, l) \

#if !defined(__ASSEMBLY__) && \

	(!defined(CONFIG_CC_IS_GCC) || CONFIG_GCC_VERSION >= 49000)

#include <linux/build_bug.h>

#define GENMASK_INPUT_CHECK(h, l) \

	(BUILD_BUG_ON_ZERO(__builtin_choose_expr( \

		__builtin_constant_p((l) > (h)), (l) > (h), 0)))

#else

/*

 * BUILD_BUG_ON_ZERO is not available in h files included from asm files,

 * disable the input check if that is the case.

 */

#define GENMASK_INPUT_CHECK(h, l) 0

#endif



#define __GENMASK(h, l) \

	(((~UL(0)) - (UL(1) << (l)) + 1) & \

	 (~UL(0) >> (BITS_PER_LONG - 1 - (h))))

#define GENMASK(h, l) \

	(GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))



#define GENMASK_ULL(h, l) \

#define __GENMASK_ULL(h, l) \

	(((~ULL(0)) - (ULL(1) << (l)) + 1) & \

	 (~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h))))

#define GENMASK_ULL(h, l) \

	(GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l))



#endif	/* __LINUX_BITS_H */

tools/include/linux/build_bug.h

0 → 100644
+82 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef _LINUX_BUILD_BUG_H

#define _LINUX_BUILD_BUG_H



#include <linux/compiler.h>



#ifdef __CHECKER__

#define BUILD_BUG_ON_ZERO(e) (0)

#else /* __CHECKER__ */

/*

 * Force a compilation error if condition is true, but also produce a

 * result (of value 0 and type int), so the expression can be used

 * e.g. in a structure initializer (or where-ever else comma expressions

 * aren't permitted).

 */

#define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))

#endif /* __CHECKER__ */



/* Force a compilation error if a constant expression is not a power of 2 */

#define __BUILD_BUG_ON_NOT_POWER_OF_2(n)	\

	BUILD_BUG_ON(((n) & ((n) - 1)) != 0)

#define BUILD_BUG_ON_NOT_POWER_OF_2(n)			\

	BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))



/*

 * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the

 * expression but avoids the generation of any code, even if that expression

 * has side-effects.

 */

#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e))))



/**

 * BUILD_BUG_ON_MSG - break compile if a condition is true & emit supplied

 *		      error message.

 * @condition: the condition which the compiler should know is false.

 *

 * See BUILD_BUG_ON for description.

 */

#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)



/**

 * BUILD_BUG_ON - break compile if a condition is true.

 * @condition: the condition which the compiler should know is false.

 *

 * If you have some code which relies on certain constants being equal, or

 * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to

 * detect if someone changes it.

 */

#define BUILD_BUG_ON(condition) \

	BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)



/**

 * BUILD_BUG - break compile if used.

 *

 * If you have some code that you expect the compiler to eliminate at

 * build time, you should use BUILD_BUG to detect if it is

 * unexpectedly used.

 */

#define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed")



/**

 * static_assert - check integer constant expression at build time

 *

 * static_assert() is a wrapper for the C11 _Static_assert, with a

 * little macro magic to make the message optional (defaulting to the

 * stringification of the tested expression).

 *

 * Contrary to BUILD_BUG_ON(), static_assert() can be used at global

 * scope, but requires the expression to be an integer constant

 * expression (i.e., it is not enough that __builtin_constant_p() is

 * true for expr).

 *

 * Also note that BUILD_BUG_ON() fails the build if the condition is

 * true, while static_assert() fails the build if the expression is

 * false.

 */

#ifndef static_assert

#define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)

#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)

#endif // static_assert



#endif	/* _LINUX_BUILD_BUG_H */

tools/include/linux/compiler.h

+26 −0
Original line number Diff line number Diff line
@@ -10,6 +10,32 @@ 
# define __compiletime_error(message)

#endif



#ifdef __OPTIMIZE__

# define __compiletime_assert(condition, msg, prefix, suffix)		\

	do {								\

		extern void prefix ## suffix(void) __compiletime_error(msg); \

		if (!(condition))					\

			prefix ## suffix();				\

	} while (0)

#else

# define __compiletime_assert(condition, msg, prefix, suffix) do { } while (0)

#endif



#define _compiletime_assert(condition, msg, prefix, suffix) \

	__compiletime_assert(condition, msg, prefix, suffix)



/**

 * compiletime_assert - break build and emit msg if condition is false

 * @condition: a compile-time constant condition to check

 * @msg:       a message to emit if condition is false

 *

 * In tradition of POSIX assert, this macro will break the build if the

 * supplied condition is *false*, emitting the supplied error message if the

 * compiler has support to do so.

 */

#define compiletime_assert(condition, msg) \

	_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)



/* Optimization barrier */

/* The "volatile" is due to gcc bugs */

#define barrier() __asm__ __volatile__("": : :"memory")