Commit cd036d54 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark
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drm/msm/a6xx: Add A610 speedbin support



A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125
(trinket) and SM6225 (khaje). Trinket does not support speed binning
(only a single SKU exists) and we don't yet support khaje upstream.
Hence, add a fuse mapping table for bengal to allow for per-chip
frequency limiting.

Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAkhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/542780/


Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 20c8e399
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+27 −0
Original line number Diff line number Diff line
@@ -2204,6 +2204,30 @@ static bool a6xx_progress(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
	return progress;
}

static u32 a610_get_speed_bin(u32 fuse)
{
	/*
	 * There are (at least) three SoCs implementing A610: SM6125 (trinket),
	 * SM6115 (bengal) and SM6225 (khaje). Trinket does not have speedbinning,
	 * as only a single SKU exists and we don't support khaje upstream yet.
	 * Hence, this matching table is only valid for bengal and can be easily
	 * expanded if need be.
	 */

	if (fuse == 0)
		return 0;
	else if (fuse == 206)
		return 1;
	else if (fuse == 200)
		return 2;
	else if (fuse == 157)
		return 3;
	else if (fuse == 127)
		return 4;

	return UINT_MAX;
}

static u32 a618_get_speed_bin(u32 fuse)
{
	if (fuse == 0)
@@ -2301,6 +2325,9 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_gpu *adreno_gpu, u3
{
	u32 val = UINT_MAX;

	if (adreno_is_a610(adreno_gpu))
		val = a610_get_speed_bin(fuse);

	if (adreno_is_a618(adreno_gpu))
		val = a618_get_speed_bin(fuse);