Commit ccff6d11 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'perf-tools-fixes-for-v6.5-1-2023-07-18' of... 

Merge tag 'perf-tools-fixes-for-v6.5-1-2023-07-18' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools

Pull perf tools fixes from Arnaldo Carvalho de Melo:

 - Don't group events when computing metrics that require more than the
   maximum number of simultaneously enabled events on AMD systems.

 - Fix multi CU handling in 'perf probe', add a 'perf test' entry to
   regress test it.

 - Make the 'perf test task_exit' stop generating samples by using the
   'dummy' event, all it is testing is if a PERF_RECORD_EXIT is
   generated at the end of a perf session. This makes this perf test to
   stop sometimes failing on some systems due to a full ring buffer.

 - Avoid SEGV if PMU lookup fails for legacy cache terms.

 - Fix libsubcmd SEGV/use-after-free when commands aren't excluded.

 - Fix OpenCSD (ARM64's CoreSight hardware tracing) library path
   resolution when specifying CSLIBS= in the make command line.

 - Fix broken feature check for libtracefs due to external lib changes,
   use the provided pkgconfig file instead future proof it.

 - Sync drm, fcntl, kvm, mount, prctl, socket, vhost, asound, arm64's
   cputype headers with the kernel sources, in some cases this made the
   tools become aware of new kernel APIs such as ioctls and the
   cachestat sysctl.

* tag 'perf-tools-fixes-for-v6.5-1-2023-07-18' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools:
  perf test task_exit: No need for a cycles event to check if we get an PERF_RECORD_EXIT
  tools headers arm64: Sync arm64's cputype.h with the kernel sources
  tools include UAPI: Sync the sound/asound.h copy with the kernel sources
  tools include UAPI: Sync linux/vhost.h with the kernel sources
  perf beauty: Update copy of linux/socket.h with the kernel sources
  perf parse-events: Avoid SEGV if PMU lookup fails for legacy cache terms
  libsubcmd: Avoid SEGV/use-after-free when commands aren't excluded
  tools headers UAPI: Sync linux/prctl.h with the kernel sources
  perf build: Fix broken feature check for libtracefs due to external lib changes
  tools include UAPI: Sync linux/mount.h copy with the kernel sources
  tools headers UAPI: Sync linux/kvm.h with the kernel sources
  tools headers uapi: Sync linux/fcntl.h with the kernel sources
  perf vendor events amd: Fix large metrics
  perf build: Fix library not found error when using CSLIBS
  tools headers UAPI: Sync files changed by new cachestat syscall with the kernel sources
  tools headers UAPI: Sync drm/i915_drm.h with the kernel sources
  perf probe: Read DWARF files from the correct CU
  perf probe: Add test for regression introduced by switch to die_get_decl_file()
parents 4806364a 2480232c

tools/arch/arm64/include/asm/cputype.h

+8 −0
Original line number Diff line number Diff line
@@ -126,6 +126,10 @@ 
#define APPLE_CPU_PART_M1_FIRESTORM_MAX	0x029

#define APPLE_CPU_PART_M2_BLIZZARD	0x032

#define APPLE_CPU_PART_M2_AVALANCHE	0x033

#define APPLE_CPU_PART_M2_BLIZZARD_PRO	0x034

#define APPLE_CPU_PART_M2_AVALANCHE_PRO	0x035

#define APPLE_CPU_PART_M2_BLIZZARD_MAX	0x038

#define APPLE_CPU_PART_M2_AVALANCHE_MAX	0x039



#define AMPERE_CPU_PART_AMPERE1		0xAC3
@@ -181,6 +185,10 @@ 
#define MIDR_APPLE_M1_FIRESTORM_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_MAX)

#define MIDR_APPLE_M2_BLIZZARD MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD)

#define MIDR_APPLE_M2_AVALANCHE MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE)

#define MIDR_APPLE_M2_BLIZZARD_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_PRO)

#define MIDR_APPLE_M2_AVALANCHE_PRO MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_PRO)

#define MIDR_APPLE_M2_BLIZZARD_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)

#define MIDR_APPLE_M2_AVALANCHE_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX)

#define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1)



/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */

tools/build/feature/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -208,7 +208,7 @@ $(OUTPUT)test-libtraceevent.bin: 
	$(BUILD) -ltraceevent



$(OUTPUT)test-libtracefs.bin:

	$(BUILD) -ltracefs

	 $(BUILD) $(shell $(PKG_CONFIG) --cflags libtraceevent 2>/dev/null) -ltracefs



$(OUTPUT)test-libcrypto.bin:

	$(BUILD) -lcrypto

tools/include/uapi/asm-generic/unistd.h

+4 −1
Original line number Diff line number Diff line
@@ -817,8 +817,11 @@ __SYSCALL(__NR_futex_waitv, sys_futex_waitv) 
#define __NR_set_mempolicy_home_node 450

__SYSCALL(__NR_set_mempolicy_home_node, sys_set_mempolicy_home_node)



#define __NR_cachestat 451

__SYSCALL(__NR_cachestat, sys_cachestat)



#undef __NR_syscalls

#define __NR_syscalls 451

#define __NR_syscalls 452



/*

 * 32 bit systems traditionally used different

tools/include/uapi/drm/i915_drm.h

+93 −2
Original line number Diff line number Diff line
@@ -280,7 +280,16 @@ enum drm_i915_pmu_engine_sample { 
#define I915_PMU_ENGINE_SEMA(class, instance) \

	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)



#define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))

/*

 * Top 4 bits of every non-engine counter are GT id.

 */

#define __I915_PMU_GT_SHIFT (60)



#define ___I915_PMU_OTHER(gt, x) \

	(((__u64)__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) | \

	((__u64)(gt) << __I915_PMU_GT_SHIFT))



#define __I915_PMU_OTHER(x) ___I915_PMU_OTHER(0, x)



#define I915_PMU_ACTUAL_FREQUENCY	__I915_PMU_OTHER(0)

#define I915_PMU_REQUESTED_FREQUENCY	__I915_PMU_OTHER(1)
@@ -290,6 +299,12 @@ enum drm_i915_pmu_engine_sample { 


#define I915_PMU_LAST /* Deprecated - do not use */ I915_PMU_RC6_RESIDENCY



#define __I915_PMU_ACTUAL_FREQUENCY(gt)		___I915_PMU_OTHER(gt, 0)

#define __I915_PMU_REQUESTED_FREQUENCY(gt)	___I915_PMU_OTHER(gt, 1)

#define __I915_PMU_INTERRUPTS(gt)		___I915_PMU_OTHER(gt, 2)

#define __I915_PMU_RC6_RESIDENCY(gt)		___I915_PMU_OTHER(gt, 3)

#define __I915_PMU_SOFTWARE_GT_AWAKE_TIME(gt)	___I915_PMU_OTHER(gt, 4)



/* Each region is a minimum of 16k, and there are at most 255 of them.

 */

#define I915_NR_TEX_REGIONS 255	/* table size 2k - maximum due to use
@@ -659,7 +674,8 @@ typedef struct drm_i915_irq_wait { 
 * If the IOCTL is successful, the returned parameter will be set to one of the

 * following values:

 *  * 0 if HuC firmware load is not complete,

 *  * 1 if HuC firmware is authenticated and running.

 *  * 1 if HuC firmware is loaded and fully authenticated,

 *  * 2 if HuC firmware is loaded and authenticated for clear media only

 */

#define I915_PARAM_HUC_STATUS		 42
@@ -771,6 +787,25 @@ typedef struct drm_i915_irq_wait { 
 */

#define I915_PARAM_OA_TIMESTAMP_FREQUENCY 57



/*

 * Query the status of PXP support in i915.

 *

 * The query can fail in the following scenarios with the listed error codes:

 *     -ENODEV = PXP support is not available on the GPU device or in the

 *               kernel due to missing component drivers or kernel configs.

 *

 * If the IOCTL is successful, the returned parameter will be set to one of

 * the following values:

 *     1 = PXP feature is supported and is ready for use.

 *     2 = PXP feature is supported but should be ready soon (pending

 *         initialization of non-i915 system dependencies).

 *

 * NOTE: When param is supported (positive return values), user space should

 *       still refer to the GEM PXP context-creation UAPI header specs to be

 *       aware of possible failure due to system state machine at the time.

 */

#define I915_PARAM_PXP_STATUS		 58



/* Must be kept compact -- no holes and well documented */



/**
@@ -2096,6 +2131,21 @@ struct drm_i915_gem_context_param { 
 *

 * -ENODEV: feature not available

 * -EPERM: trying to mark a recoverable or not bannable context as protected

 * -ENXIO: A dependency such as a component driver or firmware is not yet

 *         loaded so user space may need to attempt again. Depending on the

 *         device, this error may be reported if protected context creation is

 *         attempted very early after kernel start because the internal timeout

 *         waiting for such dependencies is not guaranteed to be larger than

 *         required (numbers differ depending on system and kernel config):

 *            - ADL/RPL: dependencies may take up to 3 seconds from kernel start

 *                       while context creation internal timeout is 250 milisecs

 *            - MTL: dependencies may take up to 8 seconds from kernel start

 *                   while context creation internal timeout is 250 milisecs

 *         NOTE: such dependencies happen once, so a subsequent call to create a

 *         protected context after a prior successful call will not experience

 *         such timeouts and will not return -ENXIO (unless the driver is reloaded,

 *         or, depending on the device, resumes from a suspended state).

 * -EIO: The firmware did not succeed in creating the protected context.

 */

#define I915_CONTEXT_PARAM_PROTECTED_CONTENT    0xd

/* Must be kept compact -- no holes and well documented */
@@ -3630,9 +3680,13 @@ struct drm_i915_gem_create_ext { 
	 *

	 * For I915_GEM_CREATE_EXT_PROTECTED_CONTENT usage see

	 * struct drm_i915_gem_create_ext_protected_content.

	 *

	 * For I915_GEM_CREATE_EXT_SET_PAT usage see

	 * struct drm_i915_gem_create_ext_set_pat.

	 */

#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0

#define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1

#define I915_GEM_CREATE_EXT_SET_PAT 2

	__u64 extensions;

};
@@ -3747,6 +3801,43 @@ struct drm_i915_gem_create_ext_protected_content { 
	__u32 flags;

};



/**

 * struct drm_i915_gem_create_ext_set_pat - The

 * I915_GEM_CREATE_EXT_SET_PAT extension.

 *

 * If this extension is provided, the specified caching policy (PAT index) is

 * applied to the buffer object.

 *

 * Below is an example on how to create an object with specific caching policy:

 *

 * .. code-block:: C

 *

 *      struct drm_i915_gem_create_ext_set_pat set_pat_ext = {

 *              .base = { .name = I915_GEM_CREATE_EXT_SET_PAT },

 *              .pat_index = 0,

 *      };

 *      struct drm_i915_gem_create_ext create_ext = {

 *              .size = PAGE_SIZE,

 *              .extensions = (uintptr_t)&set_pat_ext,

 *      };

 *

 *      int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);

 *      if (err) ...

 */

struct drm_i915_gem_create_ext_set_pat {

	/** @base: Extension link. See struct i915_user_extension. */

	struct i915_user_extension base;

	/**

	 * @pat_index: PAT index to be set

	 * PAT index is a bit field in Page Table Entry to control caching

	 * behaviors for GPU accesses. The definition of PAT index is

	 * platform dependent and can be found in hardware specifications,

	 */

	__u32 pat_index;

	/** @rsvd: reserved for future use */

	__u32 rsvd;

};



/* ID of the protected content session managed by i915 when PXP is active */

#define I915_PROTECTED_CONTENT_DEFAULT_SESSION 0xf

tools/include/uapi/linux/fcntl.h

+5 −0
Original line number Diff line number Diff line
@@ -112,4 +112,9 @@ 


#define AT_RECURSIVE		0x8000	/* Apply to the entire subtree */



/* Flags for name_to_handle_at(2). We reuse AT_ flag space to save bits... */

#define AT_HANDLE_FID		AT_REMOVEDIR	/* file handle is needed to

					compare object identity and may not

					be usable to open_by_handle_at(2) */



#endif /* _UAPI_LINUX_FCNTL_H */