Commit cceef209 authored by Amit Cohen's avatar Amit Cohen Committed by David S. Miller
Browse files

mlxsw: Add support for 800Gbps link modes 



Add support for 800Gbps speed, link modes of 100Gbps per lane.

Signed-off-by: default avatarAmit Cohen <amcohen@nvidia.com>
Reviewed-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarPetr Machata <petrm@nvidia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 404c7678

drivers/net/ethernet/mellanox/mlxsw/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -4620,6 +4620,7 @@ MLXSW_ITEM32(reg, ptys, an_status, 0x04, 28, 4); 
#define MLXSW_REG_PTYS_EXT_ETH_SPEED_100GAUI_2_100GBASE_CR2_KR2		BIT(10)

#define MLXSW_REG_PTYS_EXT_ETH_SPEED_200GAUI_4_200GBASE_CR4_KR4		BIT(12)

#define MLXSW_REG_PTYS_EXT_ETH_SPEED_400GAUI_8				BIT(15)

#define MLXSW_REG_PTYS_EXT_ETH_SPEED_800GAUI_8				BIT(19)



/* reg_ptys_ext_eth_proto_cap

 * Extended Ethernet port supported speeds and protocols.

drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c

+21 −0
Original line number Diff line number Diff line
@@ -1672,6 +1672,19 @@ mlxsw_sp2_mask_ethtool_400gaui_8[] = { 
#define MLXSW_SP2_MASK_ETHTOOL_400GAUI_8_LEN \

	ARRAY_SIZE(mlxsw_sp2_mask_ethtool_400gaui_8)



static const enum ethtool_link_mode_bit_indices

mlxsw_sp2_mask_ethtool_800gaui_8[] = {

	ETHTOOL_LINK_MODE_800000baseCR8_Full_BIT,

	ETHTOOL_LINK_MODE_800000baseKR8_Full_BIT,

	ETHTOOL_LINK_MODE_800000baseDR8_Full_BIT,

	ETHTOOL_LINK_MODE_800000baseDR8_2_Full_BIT,

	ETHTOOL_LINK_MODE_800000baseSR8_Full_BIT,

	ETHTOOL_LINK_MODE_800000baseVR8_Full_BIT,

};



#define MLXSW_SP2_MASK_ETHTOOL_800GAUI_8_LEN \

	ARRAY_SIZE(mlxsw_sp2_mask_ethtool_800gaui_8)



#define MLXSW_SP_PORT_MASK_WIDTH_1X	BIT(0)

#define MLXSW_SP_PORT_MASK_WIDTH_2X	BIT(1)

#define MLXSW_SP_PORT_MASK_WIDTH_4X	BIT(2)
@@ -1820,6 +1833,14 @@ static const struct mlxsw_sp2_port_link_mode mlxsw_sp2_port_link_mode[] = { 
		.speed		= SPEED_400000,

		.width		= 8,

	},

	{

		.mask		= MLXSW_REG_PTYS_EXT_ETH_SPEED_800GAUI_8,

		.mask_ethtool	= mlxsw_sp2_mask_ethtool_800gaui_8,

		.m_ethtool_len	= MLXSW_SP2_MASK_ETHTOOL_800GAUI_8_LEN,

		.mask_sup_width	= MLXSW_SP_PORT_MASK_WIDTH_8X,

		.speed		= SPEED_800000,

		.width		= 8,

	},

};



#define MLXSW_SP2_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp2_port_link_mode)