Commit ccccce22 authored by Dan Williams's avatar Dan Williams
Browse files

dmaengine: initialize tx_list in dma_async_tx_descriptor_init 



Centralize this common initialization (and one case where ipu_idmac is
duplicating ->chan initialization).

Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 8d47bae0

drivers/dma/dmaengine.c

+1 −0
Original line number Diff line number Diff line
@@ -920,6 +920,7 @@ void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, 
{

	tx->chan = chan;

	spin_lock_init(&tx->lock);

	INIT_LIST_HEAD(&tx->tx_list);

}

EXPORT_SYMBOL(dma_async_tx_descriptor_init);

drivers/dma/dw_dmac.c

+0 −1
Original line number Diff line number Diff line
@@ -826,7 +826,6 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan) 
		dma_async_tx_descriptor_init(&desc->txd, chan);

		desc->txd.tx_submit = dwc_tx_submit;

		desc->txd.flags = DMA_CTRL_ACK;

		INIT_LIST_HEAD(&desc->txd.tx_list);

		desc->txd.phys = dma_map_single(chan2parent(chan), &desc->lli,

				sizeof(desc->lli), DMA_TO_DEVICE);

		dwc_desc_put(dwc, desc);

drivers/dma/fsldma.c

+0 −1
Original line number Diff line number Diff line
@@ -354,7 +354,6 @@ static struct fsl_desc_sw *fsl_dma_alloc_descriptor( 
		dma_async_tx_descriptor_init(&desc_sw->async_tx,

						&fsl_chan->common);

		desc_sw->async_tx.tx_submit = fsl_dma_tx_submit;

		INIT_LIST_HEAD(&desc_sw->async_tx.tx_list);

		desc_sw->async_tx.phys = pdesc;

	}

drivers/dma/ioat_dma.c

+0 −1
Original line number Diff line number Diff line
@@ -693,7 +693,6 @@ static struct ioat_desc_sw *ioat_dma_alloc_descriptor( 
		desc_sw->async_tx.tx_submit = ioat2_tx_submit;

		break;

	}

	INIT_LIST_HEAD(&desc_sw->async_tx.tx_list);



	desc_sw->hw = desc;

	desc_sw->async_tx.phys = phys;

drivers/dma/iop-adma.c

+0 −1
Original line number Diff line number Diff line
@@ -498,7 +498,6 @@ static int iop_adma_alloc_chan_resources(struct dma_chan *chan) 
		slot->async_tx.tx_submit = iop_adma_tx_submit;

		INIT_LIST_HEAD(&slot->chain_node);

		INIT_LIST_HEAD(&slot->slot_node);

		INIT_LIST_HEAD(&slot->async_tx.tx_list);

		hw_desc = (char *) iop_chan->device->dma_desc_pool;

		slot->async_tx.phys =

			(dma_addr_t) &hw_desc[idx * IOP_ADMA_SLOT_SIZE];