Commit cca50a59 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

ARM: dts: exynos: add a specific compatible to MCT 



One compatible is used for the Multi-Core Timer on most of the Samsung
Exynos SoCs, which is correct but not specific enough.  These MCT blocks
have different number of interrupts, so add a second specific
compatible to Exynos3250 and all Exynos5 SoCs.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarAlim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220304122424.307885-3-krzysztof.kozlowski@canonical.com
parent c3d3727c

arch/arm/boot/dts/exynos3250.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -269,7 +269,8 @@ 
		};



		timer@10050000 {

			compatible = "samsung,exynos4210-mct";

			compatible = "samsung,exynos3250-mct",

				     "samsung,exynos4210-mct";

			reg = <0x10050000 0x800>;

			interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,

arch/arm/boot/dts/exynos5250.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -245,7 +245,8 @@ 
		};



		timer@101c0000 {

			compatible = "samsung,exynos4210-mct";

			compatible = "samsung,exynos5250-mct",

				     "samsung,exynos4210-mct";

			reg = <0x101C0000 0x800>;

			clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;

			clock-names = "fin_pll", "mct";

arch/arm/boot/dts/exynos5260.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -333,7 +333,8 @@ 
		};



		mct: timer@100b0000 {

			compatible = "samsung,exynos4210-mct";

			compatible = "samsung,exynos5260-mct",

				     "samsung,exynos4210-mct";

			reg = <0x100B0000 0x1000>;

			clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>;

			clock-names = "fin_pll", "mct";

arch/arm/boot/dts/exynos54xx.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -74,7 +74,8 @@ 
		};



		mct: timer@101c0000 {

			compatible = "samsung,exynos4210-mct";

			compatible = "samsung,exynos5420-mct",

				     "samsung,exynos4210-mct";

			reg = <0x101c0000 0xb00>;

			interrupts-extended = <&combiner 23 3>,

					      <&combiner 23 4>,