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Commit cc61ab9b authored by Yuantian Tang's avatar Yuantian Tang Committed by Stephen Boyd
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clk: qoriq: add more PLL divider clocks support



More PLL divider clocks are needed by clock consumer IP. So enlarge
the PLL divider array to accommodate more divider clocks.

Signed-off-by: default avatarYuantian Tang <andy.tang@nxp.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent f34b2c26
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