Unverified Commit cc27062b authored by Alexander Sverdlin's avatar Alexander Sverdlin Committed by Mark Brown
Browse files

ASoC: cirrus: i2s: Stop enabling I2S2 and I2S3 FIFOs



The driver never supported more than 2 channels because of
ep93xx_i2s_dma_data[] supporting only 1 DMA channel in each
direction.
Stop enabling two unused I2S controller FIFOs, this will simplify
future interrupt support.

Signed-off-by: default avatarAlexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 25c8b550
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+4 −8
Original line number Original line Diff line number Diff line
@@ -98,7 +98,6 @@ static inline unsigned ep93xx_i2s_read_reg(struct ep93xx_i2s_info *info,
static void ep93xx_i2s_enable(struct ep93xx_i2s_info *info, int stream)
static void ep93xx_i2s_enable(struct ep93xx_i2s_info *info, int stream)
{
{
	unsigned base_reg;
	unsigned base_reg;
	int i;


	if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
	if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
	    (ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {
	    (ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {
@@ -111,27 +110,24 @@ static void ep93xx_i2s_enable(struct ep93xx_i2s_info *info, int stream)
		ep93xx_i2s_write_reg(info, EP93XX_I2S_GLCTRL, 1);
		ep93xx_i2s_write_reg(info, EP93XX_I2S_GLCTRL, 1);
	}
	}


	/* Enable fifos */
	/* Enable fifo */
	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
		base_reg = EP93XX_I2S_TX0EN;
		base_reg = EP93XX_I2S_TX0EN;
	else
	else
		base_reg = EP93XX_I2S_RX0EN;
		base_reg = EP93XX_I2S_RX0EN;
	for (i = 0; i < 3; i++)
	ep93xx_i2s_write_reg(info, base_reg, 1);
		ep93xx_i2s_write_reg(info, base_reg + (i * 4), 1);
}
}


static void ep93xx_i2s_disable(struct ep93xx_i2s_info *info, int stream)
static void ep93xx_i2s_disable(struct ep93xx_i2s_info *info, int stream)
{
{
	unsigned base_reg;
	unsigned base_reg;
	int i;


	/* Disable fifos */
	/* Disable fifo */
	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
		base_reg = EP93XX_I2S_TX0EN;
		base_reg = EP93XX_I2S_TX0EN;
	else
	else
		base_reg = EP93XX_I2S_RX0EN;
		base_reg = EP93XX_I2S_RX0EN;
	for (i = 0; i < 3; i++)
	ep93xx_i2s_write_reg(info, base_reg, 0);
		ep93xx_i2s_write_reg(info, base_reg + (i * 4), 0);


	if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
	if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
	    (ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {
	    (ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {