Commit cc0a75eb authored by Russell King (Oracle)'s avatar Russell King (Oracle) Committed by Jakub Kicinski
Browse files

net: macb: convert to phylink_generic_validate() 



Populate the supported interfaces bitmap and MAC capabilities mask for
the macb driver and remove the old validate implementation.

Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/E1mpuRv-00D4rb-Lz@rmk-PC.armlinux.org.uk


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 4e9c91cf

drivers/net/ethernet/cadence/macb_main.c

+30 −103
Original line number Diff line number Diff line
@@ -506,108 +506,6 @@ static void macb_set_tx_clk(struct macb *bp, int speed) 
		netdev_err(bp->dev, "adjusting tx_clk failed.\n");

}



static void macb_validate(struct phylink_config *config,

			  unsigned long *supported,

			  struct phylink_link_state *state)

{

	struct net_device *ndev = to_net_dev(config->dev);

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };

	struct macb *bp = netdev_priv(ndev);

	bool have_1g=false, have_sgmii=false, have_10g=false;



	/* Determine what modes are supported */

	if (macb_is_gem(bp) &&

	    (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE)) {

		have_1g = true;

		if (bp->caps & MACB_CAPS_PCS)

			have_sgmii = true;

		if (bp->caps & MACB_CAPS_HIGH_SPEED)

			have_10g = true;

	}



	/* Eliminate unsupported modes */

	switch (state->interface) {

	case PHY_INTERFACE_MODE_NA:

	case PHY_INTERFACE_MODE_MII:

	case PHY_INTERFACE_MODE_RMII:

		break;



	case PHY_INTERFACE_MODE_GMII:

	case PHY_INTERFACE_MODE_RGMII:

	case PHY_INTERFACE_MODE_RGMII_ID:

	case PHY_INTERFACE_MODE_RGMII_RXID:

	case PHY_INTERFACE_MODE_RGMII_TXID:

		if (have_1g)

			break;

		linkmode_zero(supported);

		return;



	case PHY_INTERFACE_MODE_SGMII:

		if (have_sgmii)

			break;

		linkmode_zero(supported);

		return;



	case PHY_INTERFACE_MODE_10GBASER:

		if (have_10g)

			break;

		fallthrough;



	default:

		linkmode_zero(supported);

		return;

	}



	phylink_set_port_modes(mask);

	phylink_set(mask, Autoneg);

	phylink_set(mask, Asym_Pause);



	/* And set the appropriate mask */

	switch (state->interface) {

	case PHY_INTERFACE_MODE_NA:

	case PHY_INTERFACE_MODE_10GBASER:

		if (have_10g) {

			phylink_set_10g_modes(mask);

			phylink_set(mask, 10000baseKR_Full);

		}

		if (state->interface != PHY_INTERFACE_MODE_NA)

			break;

		fallthrough;



	/* FIXME: Do we actually support 10/100 for SGMII? Half duplex? */

	case PHY_INTERFACE_MODE_SGMII:

		if (!have_sgmii && state->interface != PHY_INTERFACE_MODE_NA)

			break;

		fallthrough;



	case PHY_INTERFACE_MODE_GMII:

	case PHY_INTERFACE_MODE_RGMII:

	case PHY_INTERFACE_MODE_RGMII_ID:

	case PHY_INTERFACE_MODE_RGMII_RXID:

	case PHY_INTERFACE_MODE_RGMII_TXID:

		if (have_1g) {

			phylink_set(mask, 1000baseT_Full);

			phylink_set(mask, 1000baseX_Full);



			if (!(bp->caps & MACB_CAPS_NO_GIGABIT_HALF))

				phylink_set(mask, 1000baseT_Half);

		} else if (state->interface != PHY_INTERFACE_MODE_NA) {

			break;

		}

		fallthrough;



	default:

		phylink_set(mask, 10baseT_Half);

		phylink_set(mask, 10baseT_Full);

		phylink_set(mask, 100baseT_Half);

		phylink_set(mask, 100baseT_Full);

		break;

	}



	linkmode_and(supported, supported, mask);

	linkmode_and(state->advertising, state->advertising, mask);

}



static void macb_usx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,

				 phy_interface_t interface, int speed,

				 int duplex)
@@ -849,7 +747,7 @@ static int macb_mac_prepare(struct phylink_config *config, unsigned int mode, 
}



static const struct phylink_mac_ops macb_phylink_ops = {

	.validate = macb_validate,

	.validate = phylink_generic_validate,

	.mac_prepare = macb_mac_prepare,

	.mac_config = macb_mac_config,

	.mac_link_down = macb_mac_link_down,
@@ -916,6 +814,35 @@ static int macb_mii_probe(struct net_device *dev) 
		bp->phylink_config.get_fixed_state = macb_get_pcs_fixed_state;

	}



	bp->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |

		MAC_10 | MAC_100;



	__set_bit(PHY_INTERFACE_MODE_MII,

		  bp->phylink_config.supported_interfaces);

	__set_bit(PHY_INTERFACE_MODE_RMII,

		  bp->phylink_config.supported_interfaces);



	/* Determine what modes are supported */

	if (macb_is_gem(bp) && (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE)) {

		bp->phylink_config.mac_capabilities |= MAC_1000FD;

		if (!(bp->caps & MACB_CAPS_NO_GIGABIT_HALF))

			bp->phylink_config.mac_capabilities |= MAC_1000HD;



		__set_bit(PHY_INTERFACE_MODE_GMII,

			  bp->phylink_config.supported_interfaces);

		phy_interface_set_rgmii(bp->phylink_config.supported_interfaces);



		if (bp->caps & MACB_CAPS_PCS)

			__set_bit(PHY_INTERFACE_MODE_SGMII,

				  bp->phylink_config.supported_interfaces);



		if (bp->caps & MACB_CAPS_HIGH_SPEED) {

			__set_bit(PHY_INTERFACE_MODE_10GBASER,

				  bp->phylink_config.supported_interfaces);

			bp->phylink_config.mac_capabilities |= MAC_10000FD;

		}

	}



	bp->phylink = phylink_create(&bp->phylink_config, bp->pdev->dev.fwnode,

				     bp->phy_interface, &macb_phylink_ops);

	if (IS_ERR(bp->phylink)) {