Commit cc05af8e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-fixes-5.10-4' of...

Merge tag 'imx-fixes-5.10-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.10, round 4:

- Fix MDIO over clocking on vf610-zii-dev-rev-b board to get switch
  device work reliably.
- Fix imx50-evk IOMUX for the chip select 1 to use GPIO4_13 instead of
  the native CSPI_SSI function.
- Fix voltage for 1.6GHz CPU operating point on i.MX8MM to match
  hardware datasheet.
- Fix phy-mode for KSZ9031 PHY on imx6qdl-udoo board.

* tag 'imx-fixes-5.10-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx50-evk: Fix the chip select 1 IOMUX
  arm64: dts: imx8mm: fix voltage for 1.6GHz CPU operating point
  ARM: dts: vf610-zii-dev-rev-b: Fix MDIO over clocking
  arm: dts: imx6qdl-udoo: fix rgmii phy-mode for ksz9031 phy

Link: https://lore.kernel.org/r/20201116090702.GM5849@dragon


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 39c8d39c 33d0d843
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -59,7 +59,7 @@
				MX50_PAD_CSPI_MISO__CSPI_MISO		0x00
				MX50_PAD_CSPI_MOSI__CSPI_MOSI		0x00
				MX50_PAD_CSPI_SS0__GPIO4_11		0xc4
				MX50_PAD_ECSPI1_MOSI__CSPI_SS1		0xf4
				MX50_PAD_ECSPI1_MOSI__GPIO4_13		0x84
			>;
		};

+1 −1
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@
&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii";
	phy-mode = "rgmii-id";
	status = "okay";
};

+3 −0
Original line number Diff line number Diff line
@@ -406,6 +406,9 @@
	};
};

&mdio1 {
	clock-frequency = <5000000>;
};

&iomuxc {
	pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {
+1 −1
Original line number Diff line number Diff line
@@ -129,7 +129,7 @@

		opp-1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <900000>;
			opp-microvolt = <950000>;
			opp-supported-hw = <0xc>, <0x7>;
			clock-latency-ns = <150000>;
			opp-suspend;