Commit cb1e0b01 authored by Wayne Lin's avatar Wayne Lin Committed by Alex Deucher
Browse files

drm/amdgpu/display/mst: limit payload to be updated one by one 

[Why]
amdgpu expects to update payload table for one stream one time
by calling dm_helpers_dp_mst_write_payload_allocation_table().
Currently, it get modified to try to update HW payload table
at once by referring mst_state.

[How]
This is just a quick workaround. Should find way to remove the
temporary struct dc_dp_mst_stream_allocation_table later if set
struct link_mst_stream_allocatio directly is possible.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2171


Signed-off-by: default avatarWayne Lin <Wayne.Lin@amd.com>
Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Fixes: 4d07b0bc ("drm/display/dp_mst: Move all payload info into the atomic state")
Cc: stable@vger.kernel.org # 6.1
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
Tested-by: default avatarDidier Raboud <odyx@debian.org>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1119e1f9

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c

+39 −12
Original line number Diff line number Diff line
@@ -120,24 +120,51 @@ enum dc_edid_status dm_helpers_parse_edid_caps( 
}



static void

fill_dc_mst_payload_table_from_drm(struct drm_dp_mst_topology_state *mst_state,

				   struct amdgpu_dm_connector *aconnector,

fill_dc_mst_payload_table_from_drm(struct dc_link *link,

				   bool enable,

				   struct drm_dp_mst_atomic_payload *target_payload,

				   struct dc_dp_mst_stream_allocation_table *table)

{

	struct dc_dp_mst_stream_allocation_table new_table = { 0 };

	struct dc_dp_mst_stream_allocation *sa;

	struct drm_dp_mst_atomic_payload *payload;

	struct link_mst_stream_allocation_table copy_of_link_table =

										link->mst_stream_alloc_table;



	/* Fill payload info*/

	list_for_each_entry(payload, &mst_state->payloads, next) {

		if (payload->delete)

			continue;

	int i;

	int current_hw_table_stream_cnt = copy_of_link_table.stream_count;

	struct link_mst_stream_allocation *dc_alloc;



	/* TODO: refactor to set link->mst_stream_alloc_table directly if possible.*/

	if (enable) {

		dc_alloc =

		&copy_of_link_table.stream_allocations[current_hw_table_stream_cnt];

		dc_alloc->vcp_id = target_payload->vcpi;

		dc_alloc->slot_count = target_payload->time_slots;

	} else {

		for (i = 0; i < copy_of_link_table.stream_count; i++) {

			dc_alloc =

			&copy_of_link_table.stream_allocations[i];



			if (dc_alloc->vcp_id == target_payload->vcpi) {

				dc_alloc->vcp_id = 0;

				dc_alloc->slot_count = 0;

				break;

			}

		}

		ASSERT(i != copy_of_link_table.stream_count);

	}



	/* Fill payload info*/

	for (i = 0; i < MAX_CONTROLLER_NUM; i++) {

		dc_alloc =

			&copy_of_link_table.stream_allocations[i];

		if (dc_alloc->vcp_id > 0 && dc_alloc->slot_count > 0) {

			sa = &new_table.stream_allocations[new_table.stream_count];

		sa->slot_count = payload->time_slots;

		sa->vcp_id = payload->vcpi;

			sa->slot_count = dc_alloc->slot_count;

			sa->vcp_id = dc_alloc->vcp_id;

			new_table.stream_count++;

		}

	}



	/* Overwrite the old table */

	*table = new_table;
@@ -185,7 +212,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table( 
	 * AUX message. The sequence is slot 1-63 allocated sequence for each

	 * stream. AMD ASIC stream slot allocation should follow the same

	 * sequence. copy DRM MST allocation to dc */

	fill_dc_mst_payload_table_from_drm(mst_state, aconnector, proposed_table);

	fill_dc_mst_payload_table_from_drm(stream->link, enable, payload, proposed_table);



	return true;

}