Commit caf0dced authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-meson-v6.6-1' of https://github.com/BayLibre/clk-meson into clk-amlogic 

Pull Amlogic clk driver updates from Jerome Brunet:

 - dt-bindings: expose all Amlogic clock ids
 - Migrate Amlogic gxbb clock controllers dt-bindings to schema

* tag 'clk-meson-v6.6-1' of https://github.com/BayLibre/clk-meson: (22 commits)
  dt-bindings: soc: amlogic: document System Control registers
  dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema
  dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema
  clk: meson: axg-audio: move bindings include to main driver
  clk: meson: meson8b: move bindings include to main driver
  clk: meson: a1: move bindings include to main driver
  clk: meson: eeclk: move bindings include to main driver
  clk: meson: aoclk: move bindings include to main driver
  dt-bindings: clk: axg-audio-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
  dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
  dt-bindings: clk: meson8b-clkc: expose all clock ids
  dt-bindings: clk: g12a-aoclkc: expose all clock ids
  dt-bindings: clk: g12a-clks: expose all clock ids
  dt-bindings: clk: axg-clkc: expose all clock ids
  dt-bindings: clk: gxbb-clkc: expose all clock ids
  clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS
  clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS
  ...
parents 06c2afb8 4d023beb

Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt

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* Amlogic GXBB AO Clock and Reset Unit



The Amlogic GXBB AO clock controller generates and supplies clock to various

controllers within the Always-On part of the SoC.



Required Properties:



- compatible: value should be different for each SoC family as :

	- GXBB (S905) : "amlogic,meson-gxbb-aoclkc"

	- GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc"

	- GXM (S912) : "amlogic,meson-gxm-aoclkc"

	- AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"

	- G12A (S905X2, S905D2, S905Y2) : "amlogic,meson-g12a-aoclkc"

	followed by the common "amlogic,meson-gx-aoclkc"

- clocks: list of clock phandle, one for each entry clock-names.

- clock-names: should contain the following:

  * "xtal"     : the platform xtal

  * "mpeg-clk" : the main clock controller mother clock (aka clk81)

  * "ext-32k-0"  : external 32kHz reference #0 if any (optional)

  * "ext-32k-1"  : external 32kHz reference #1 if any (optional - gx only)

  * "ext-32k-2"  : external 32kHz reference #2 if any (optional - gx only)



- #clock-cells: should be 1.



Each clock is assigned an identifier and client nodes can use this identifier

to specify the clock which they consume. All available clocks are defined as

preprocessor macros in the dt-bindings/clock/gxbb-aoclkc.h header and can be

used in device tree sources.



- #reset-cells: should be 1.



Each reset is assigned an identifier and client nodes can use this identifier

to specify the reset which they consume. All available resets are defined as

preprocessor macros in the dt-bindings/reset/gxbb-aoclkc.h header and can be

used in device tree sources.



Parent node should have the following properties :

- compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"

- reg: base address and size of the AO system control register space.



Example: AO Clock controller node:



ao_sysctrl: sys-ctrl@0 {

	compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";

	reg =  <0x0 0x0 0x0 0x100>;



	clkc_AO: clock-controller {

		compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";

		#clock-cells = <1>;

		#reset-cells = <1>;

		clocks = <&xtal>, <&clkc CLKID_CLK81>;

		clock-names = "xtal", "mpeg-clk";

	};



Example: UART controller node that consumes the clock and reset generated

  by the clock controller:



	uart_AO: serial@4c0 {

		compatible = "amlogic,meson-uart";

		reg = <0x4c0 0x14>;

		interrupts = <0 90 1>;

		clocks = <&clkc_AO CLKID_AO_UART1>;

		resets = <&clkc_AO RESET_AO_UART1>;

	};

Documentation/devicetree/bindings/clock/amlogic,gxbb-aoclkc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/amlogic,gxbb-aoclkc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Always-On Clock Controller



maintainers:

  - Neil Armstrong <neil.armstrong@linaro.org>



properties:

  compatible:

    oneOf:

      - items:

          - enum:

              - amlogic,meson-gxbb-aoclkc

              - amlogic,meson-gxl-aoclkc

              - amlogic,meson-gxm-aoclkc

              - amlogic,meson-axg-aoclkc

          - const: amlogic,meson-gx-aoclkc

      - enum:

          - amlogic,meson-axg-aoclkc

          - amlogic,meson-g12a-aoclkc



  clocks:

    minItems: 2

    maxItems: 5



  clock-names:

    minItems: 2

    items:

      - const: xtal

      - const: mpeg-clk

      - const: ext-32k-0

      - const: ext-32k-1

      - const: ext-32k-2



  '#clock-cells':

    const: 1



  '#reset-cells':

    const: 1



required:

  - compatible

  - clocks

  - clock-names

  - '#clock-cells'

  - '#reset-cells'



allOf:

  - if:

      properties:

        compatible:

          enum:

            - amlogic,meson-g12a-aoclkc



    then:

      properties:

        clocks:

          minItems: 2

          maxItems: 3



        clock-names:

          minItems: 2

          maxItems: 3



  - if:

      properties:

        compatible:

          enum:

            - amlogic,meson-gxl-aoclkc

            - amlogic,meson-gxm-aoclkc

            - amlogic,meson-axg-aoclkc



    then:

      properties:

        clocks:

          maxItems: 2



        clock-names:

          maxItems: 2



additionalProperties: false

Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt

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* Amlogic GXBB Clock and Reset Unit



The Amlogic GXBB clock controller generates and supplies clock to various

controllers within the SoC.



Required Properties:



- compatible: should be:

		"amlogic,gxbb-clkc" for GXBB SoC,

		"amlogic,gxl-clkc" for GXL and GXM SoC,

		"amlogic,axg-clkc" for AXG SoC.

		"amlogic,g12a-clkc" for G12A SoC.

		"amlogic,g12b-clkc" for G12B SoC.

		"amlogic,sm1-clkc" for SM1 SoC.

- clocks : list of clock phandle, one for each entry clock-names.

- clock-names : should contain the following:

  * "xtal": the platform xtal



- #clock-cells: should be 1.



Each clock is assigned an identifier and client nodes can use this identifier

to specify the clock which they consume. All available clocks are defined as

preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be

used in device tree sources.



Parent node should have the following properties :

- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or

              "amlogic,meson-axg-hhi-sysctrl"

- reg: base address and size of the HHI system control register space.



Example: Clock controller node:



sysctrl: system-controller@0 {

	compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";

	reg = <0 0 0 0x400>;



	clkc: clock-controller {

		#clock-cells = <1>;

		compatible = "amlogic,gxbb-clkc";

		clocks = <&xtal>;

		clock-names = "xtal";

	};

};



Example: UART controller node that consumes the clock generated by the clock

  controller:



	uart_AO: serial@c81004c0 {

		compatible = "amlogic,meson-uart";

		reg = <0xc81004c0 0x14>;

		interrupts = <0 90 1>;

		clocks = <&clkc CLKID_CLK81>;

	};

Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/amlogic,gxbb-clkc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Clock Controller



maintainers:

  - Neil Armstrong <neil.armstrong@linaro.org>



properties:

  compatible:

    enum:

      - amlogic,gxbb-clkc

      - amlogic,gxl-clkc

      - amlogic,axg-clkc

      - amlogic,g12a-clkc

      - amlogic,g12b-clkc

      - amlogic,sm1-clkc



  clocks:

    maxItems: 1



  clock-names:

    const: xtal



  '#clock-cells':

    const: 1



required:

  - compatible

  - clocks

  - clock-names

  - '#clock-cells'



additionalProperties: false

Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Meson System Control registers



maintainers:

  - Neil Armstrong <neil.armstrong@linaro.org>



properties:

  compatible:

    items:

      - enum:

          - amlogic,meson-gx-hhi-sysctrl

          - amlogic,meson-gx-ao-sysctrl

          - amlogic,meson-axg-hhi-sysctrl

          - amlogic,meson-axg-ao-sysctrl

      - const: simple-mfd

      - const: syscon



  reg:

    maxItems: 1



  clock-controller:

    type: object



  power-controller:

    $ref: /schemas/power/amlogic,meson-ee-pwrc.yaml



  pinctrl:

    type: object



  phy:

    type: object



allOf:

  - if:

      properties:

        compatible:

          enum:

            - amlogic,meson-gx-hhi-sysctrl

            - amlogic,meson-axg-hhi-sysctrl

    then:

      properties:

        clock-controller:

          $ref: /schemas/clock/amlogic,gxbb-clkc.yaml#



      required:

        - power-controller



  - if:

      properties:

        compatible:

          enum:

            - amlogic,meson-gx-ao-sysctrl

            - amlogic,meson-axg-ao-sysctrl

    then:

      properties:

        clock-controller:

          $ref: /schemas/clock/amlogic,gxbb-aoclkc.yaml#



        power-controller: false

        phy: false



  - if:

      properties:

        compatible:

          enum:

            - amlogic,meson-gx-hhi-sysctrl

    then:

      properties:

        phy: false



  - if:

      properties:

        compatible:

          enum:

            - amlogic,meson-axg-hhi-sysctrl

    then:

      properties:

        phy:

          oneOf:

            - $ref: /schemas/phy/amlogic,g12a-mipi-dphy-analog.yaml

            - $ref: /schemas/phy/amlogic,meson-axg-mipi-pcie-analog.yaml



required:

  - compatible

  - reg

  - clock-controller



additionalProperties: false



examples:

  - |

    bus@c883c000 {

        compatible = "simple-bus";

        reg = <0xc883c000 0x2000>;

        #address-cells = <1>;

        #size-cells = <1>;

        ranges = <0x0 0xc883c000 0x2000>;



        sysctrl: system-controller@0 {

            compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";

            reg = <0 0x400>;



            clock-controller {

                compatible = "amlogic,gxbb-clkc";

                #clock-cells = <1>;

                clocks = <&xtal>;

                clock-names = "xtal";

            };



            power-controller {

                compatible = "amlogic,meson-gxbb-pwrc";

                #power-domain-cells = <1>;

                amlogic,ao-sysctrl = <&sysctrl_AO>;



                resets = <&reset_viu>,

                         <&reset_venc>,

                         <&reset_vcbus>,

                         <&reset_bt656>,

                         <&reset_dvin>,

                         <&reset_rdma>,

                         <&reset_venci>,

                         <&reset_vencp>,

                         <&reset_vdac>,

                         <&reset_vdi6>,

                         <&reset_vencl>,

                         <&reset_vid_lock>;

                reset-names = "viu", "venc", "vcbus", "bt656", "dvin",

                              "rdma", "venci", "vencp", "vdac", "vdi6",

                              "vencl", "vid_lock";

                clocks = <&clk_vpu>, <&clk_vapb>;

                clock-names = "vpu", "vapb";

            };

        };

    };



    bus@c8100000 {

        compatible = "simple-bus";

        reg = <0xc8100000 0x100000>;

        #address-cells = <1>;

        #size-cells = <1>;

        ranges = <0x0 0xc8100000 0x100000>;



        sysctrl_AO: system-controller@0 {

            compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";

            reg = <0 0x100>;



            clock-controller {

                compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";

                #clock-cells = <1>;

                #reset-cells = <1>;

                clocks = <&xtal>, <&clk81>;

                clock-names = "xtal", "mpeg-clk";

            };

        };

    };