Commit caa574ff authored by Matthew Auld's avatar Matthew Auld Committed by Lucas De Marchi
Browse files

drm/i915/uapi: document behaviour for DG2 64K support 



On discrete platforms like DG2, we need to support a minimum page size
of 64K when dealing with device local-memory. This is quite tricky for
various reasons, so try to document the new implicit uapi for this.

v4: Kdoc modification.
v3: fix typos and less emphasis
v2: Fixed suggestions on formatting [Daniel]

Signed-off-by: default avatarMatthew Auld <matthew.auld@intel.com>
Signed-off-by: default avatarRamalingam C <ramalingam.c@intel.com>
Signed-off-by: default avatarRobert Beckett <bob.beckett@collabora.com>
Acked-by: default avatarJordan Justen <jordan.l.justen@intel.com>
Reviewed-by: default avatarRamalingam C <ramalingam.c@intel.com>
Reviewed-by: default avatarThomas Hellström <thomas.hellstrom@linux.intel.com>
cc: Simon Ser <contact@emersion.fr>
cc: Pekka Paalanen <ppaalanen@gmail.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-dev@lists.freedesktop.org
Cc: Tony Ye <tony.ye@intel.com>
Cc: Slawomir Milczarek <slawomir.milczarek@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220218184752.7524-13-ramalingam.c@intel.com
parent 00e27ad8

include/uapi/drm/i915_drm.h

+40 −5
Original line number Diff line number Diff line
@@ -1118,10 +1118,16 @@ struct drm_i915_gem_exec_object2 { 
	/**

	 * When the EXEC_OBJECT_PINNED flag is specified this is populated by

	 * the user with the GTT offset at which this object will be pinned.

	 *

	 * When the I915_EXEC_NO_RELOC flag is specified this must contain the

	 * presumed_offset of the object.

	 *

	 * During execbuffer2 the kernel populates it with the value of the

	 * current GTT offset of the object, for future presumed_offset writes.

	 *

	 * See struct drm_i915_gem_create_ext for the rules when dealing with

	 * alignment restrictions with I915_MEMORY_CLASS_DEVICE, on devices with

	 * minimum page sizes, like DG2.

	 */

	__u64 offset;
@@ -3144,11 +3150,40 @@ struct drm_i915_gem_create_ext { 
	 *

	 * The (page-aligned) allocated size for the object will be returned.

	 *

	 * Note that for some devices we have might have further minimum

	 * page-size restrictions(larger than 4K), like for device local-memory.

	 * However in general the final size here should always reflect any

	 * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS

	 * extension to place the object in device local-memory.

	 *

	 * DG2 64K min page size implications:

	 *

	 * On discrete platforms, starting from DG2, we have to contend with GTT

	 * page size restrictions when dealing with I915_MEMORY_CLASS_DEVICE

	 * objects.  Specifically the hardware only supports 64K or larger GTT

	 * page sizes for such memory. The kernel will already ensure that all

	 * I915_MEMORY_CLASS_DEVICE memory is allocated using 64K or larger page

	 * sizes underneath.

	 *

	 * Note that the returned size here will always reflect any required

	 * rounding up done by the kernel, i.e 4K will now become 64K on devices

	 * such as DG2.

	 *

	 * Special DG2 GTT address alignment requirement:

	 *

	 * The GTT alignment will also need to be at least 2M for such objects.

	 *

	 * Note that due to how the hardware implements 64K GTT page support, we

	 * have some further complications:

	 *

	 *   1) The entire PDE (which covers a 2MB virtual address range), must

	 *   contain only 64K PTEs, i.e mixing 4K and 64K PTEs in the same

	 *   PDE is forbidden by the hardware.

	 *

	 *   2) We still need to support 4K PTEs for I915_MEMORY_CLASS_SYSTEM

	 *   objects.

	 *

	 * To keep things simple for userland, we mandate that any GTT mappings

	 * must be aligned to and rounded up to 2MB. The kernel will internally

	 * pad them out to the next 2MB boundary. As this only wastes virtual

	 * address space and avoids userland having to copy any needlessly

	 * complicated PDE sharing scheme (coloring) and only affects DG2, this

	 * is deemed to be a good compromise.

	 */

	__u64 size;

	/**