Commit ca9c7abf authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 fixes from Will Deacon:
 "The main one is a fix for a broken strscpy() conversion that landed in
  the merge window and broke early parsing of the kernel command line.

   - Fix an incorrect mask in the CXL PMU driver

   - Fix a regression in early parsing of the kernel command line

   - Fix an IP checksum OoB access reported by syzbot"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: csum: Fix OoB access in IP checksum code for negative lengths
  arm64/sysreg: Fix broken strncpy() -> strscpy() conversion
  perf: CXL: fix mismatched number of counters mask
parents 12952b6b 8bd795fe

arch/arm64/kernel/idreg-override.c

+3 −3
Original line number Diff line number Diff line
@@ -262,9 +262,9 @@ static __init void __parse_cmdline(const char *cmdline, bool parse_aliases) 
		if (!len)

			return;



		len = strscpy(buf, cmdline, ARRAY_SIZE(buf));

		if (len == -E2BIG)

			len = ARRAY_SIZE(buf) - 1;

		len = min(len, ARRAY_SIZE(buf) - 1);

		memcpy(buf, cmdline, len);

		buf[len] = '\0';



		if (strcmp(buf, "--") == 0)

			return;

arch/arm64/lib/csum.c

+1 −1
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ unsigned int __no_sanitize_address do_csum(const unsigned char *buff, int len) 
	const u64 *ptr;

	u64 data, sum64 = 0;



	if (unlikely(len == 0))

	if (unlikely(len <= 0))

		return 0;



	offset = (unsigned long)buff & 7;

drivers/perf/cxl_pmu.c

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
#include "../cxl/pmu.h"



#define CXL_PMU_CAP_REG			0x0

#define   CXL_PMU_CAP_NUM_COUNTERS_MSK			GENMASK_ULL(4, 0)

#define   CXL_PMU_CAP_NUM_COUNTERS_MSK			GENMASK_ULL(5, 0)

#define   CXL_PMU_CAP_COUNTER_WIDTH_MSK			GENMASK_ULL(15, 8)

#define   CXL_PMU_CAP_NUM_EVN_CAP_REG_SUP_MSK		GENMASK_ULL(24, 20)

#define   CXL_PMU_CAP_FILTERS_SUP_MSK			GENMASK_ULL(39, 32)