Commit ca962882 authored by Mika Kahola's avatar Mika Kahola Committed by Lucas De Marchi
Browse files

drm/i915/adl_p: Define and use ADL-P specific DP translation tables 



Define and use DP voltage swing and pre-emphasis translation tables
for ADL-P.

v2:
 - Update according to recent bspec updates; there are now separate
   tables for RBR/HBR and HBR2/HBR3.  (Anusha)

BSpec: 54956
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: default avatarMika Kahola <mika.kahola@intel.com>
Signed-off-by: default avatarClinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarClint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210519000625.3184321-14-lucas.demarchi@intel.com
parent 2d776579

drivers/gpu/drm/i915/display/intel_ddi.c

+6 −1
Original line number Diff line number Diff line
@@ -985,6 +985,8 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp, 
	if (DISPLAY_VER(dev_priv) >= 12) {

		if (intel_phy_is_combo(dev_priv, phy))

			tgl_get_combo_buf_trans(encoder, crtc_state, &n_entries);

		else if (IS_ALDERLAKE_P(dev_priv))

			adlp_get_dkl_buf_trans(encoder, crtc_state, &n_entries);

		else

			tgl_get_dkl_buf_trans(encoder, crtc_state, &n_entries);

	} else if (DISPLAY_VER(dev_priv) == 11) {
@@ -1431,6 +1433,9 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, 
	if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT)

		return;



	if (IS_ALDERLAKE_P(dev_priv))

		ddi_translations = adlp_get_dkl_buf_trans(encoder, crtc_state, &n_entries);

	else

		ddi_translations = tgl_get_dkl_buf_trans(encoder, crtc_state, &n_entries);



	if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c

+53 −0
Original line number Diff line number Diff line
@@ -735,6 +735,34 @@ static const struct cnl_ddi_buf_trans rkl_combo_phy_ddi_translations_dp_hbr2_hbr 
	{ 0x6, 0x7F, 0x3F, 0x00, 0x00 },	/* 900   900      0.0   */

};



static const struct tgl_dkl_phy_ddi_buf_trans adlp_dkl_phy_dp_ddi_trans_hbr[] = {

				/* VS	pre-emp	Non-trans mV	Pre-emph dB */

	{ 0x7, 0x0, 0x01 },	/* 0	0	400mV		0 dB */

	{ 0x5, 0x0, 0x06 },	/* 0	1	400mV		3.5 dB */

	{ 0x2, 0x0, 0x0B },	/* 0	2	400mV		6 dB */

	{ 0x0, 0x0, 0x17 },	/* 0	3	400mV		9.5 dB */

	{ 0x5, 0x0, 0x00 },	/* 1	0	600mV		0 dB */

	{ 0x2, 0x0, 0x08 },	/* 1	1	600mV		3.5 dB */

	{ 0x0, 0x0, 0x14 },	/* 1	2	600mV		6 dB */

	{ 0x2, 0x0, 0x00 },	/* 2	0	800mV		0 dB */

	{ 0x0, 0x0, 0x0B },	/* 2	1	800mV		3.5 dB */

	{ 0x0, 0x0, 0x00 },	/* 3	0	1200mV		0 dB */

};



static const struct tgl_dkl_phy_ddi_buf_trans adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3[] = {

				/* VS	pre-emp	Non-trans mV	Pre-emph dB */

	{ 0x7, 0x0, 0x00 },	/* 0	0	400mV		0 dB */

	{ 0x5, 0x0, 0x04 },	/* 0	1	400mV		3.5 dB */

	{ 0x2, 0x0, 0x0A },	/* 0	2	400mV		6 dB */

	{ 0x0, 0x0, 0x18 },	/* 0	3	400mV		9.5 dB */

	{ 0x5, 0x0, 0x00 },	/* 1	0	600mV		0 dB */

	{ 0x2, 0x0, 0x06 },	/* 1	1	600mV		3.5 dB */

	{ 0x0, 0x0, 0x14 },	/* 1	2	600mV		6 dB */

	{ 0x2, 0x0, 0x00 },	/* 2	0	800mV		0 dB */

	{ 0x0, 0x0, 0x09 },	/* 2	1	800mV		3.5 dB */

	{ 0x0, 0x0, 0x00 },	/* 3	0	1200mV		0 dB */

};



bool is_hobl_buf_trans(const struct cnl_ddi_buf_trans *table)

{

	return table == tgl_combo_phy_ddi_translations_edp_hbr2_hobl;
@@ -1348,6 +1376,31 @@ tgl_get_dkl_buf_trans(struct intel_encoder *encoder, 
		return tgl_get_dkl_buf_trans_dp(encoder, crtc_state, n_entries);

}



static const struct tgl_dkl_phy_ddi_buf_trans *

adlp_get_dkl_buf_trans_dp(struct intel_encoder *encoder,

			  const struct intel_crtc_state *crtc_state,

			  int *n_entries)

{

	if (crtc_state->port_clock > 270000) {

		*n_entries = ARRAY_SIZE(adlp_dkl_phy_dp_ddi_trans_hbr2_hbr3);

		return adlp_dkl_phy_dp_ddi_trans_hbr;

	}



	*n_entries = ARRAY_SIZE(adlp_dkl_phy_dp_ddi_trans_hbr);

	return adlp_dkl_phy_dp_ddi_trans_hbr;

}



const struct tgl_dkl_phy_ddi_buf_trans *

adlp_get_dkl_buf_trans(struct intel_encoder *encoder,

		       const struct intel_crtc_state *crtc_state,

		       int *n_entries)

{

	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))

		return tgl_get_dkl_buf_trans_hdmi(encoder, crtc_state, n_entries);

	else

		return adlp_get_dkl_buf_trans_dp(encoder, crtc_state, n_entries);

}



int intel_ddi_hdmi_num_entries(struct intel_encoder *encoder,

			       const struct intel_crtc_state *crtc_state,

			       int *default_entry)

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h

+4 −0
Original line number Diff line number Diff line
@@ -67,6 +67,10 @@ bxt_get_buf_trans(struct intel_encoder *encoder, 
		  const struct intel_crtc_state *crtc_state,

		  int *n_entries);



const struct tgl_dkl_phy_ddi_buf_trans *

adlp_get_dkl_buf_trans(struct intel_encoder *encoder,

		       const struct intel_crtc_state *crtc_state,

		       int *n_entries);

const struct cnl_ddi_buf_trans *

tgl_get_combo_buf_trans(struct intel_encoder *encoder,

			const struct intel_crtc_state *crtc_state,