Commit ca50d776 authored by Shenwei Wang's avatar Shenwei Wang Committed by Shawn Guo
Browse files

arm64: dts: imx8-ss-dma: assign default clock rate for lpuarts



Add the assigned-clocks and assigned-clock-rates properties for the
LPUARTx nodes. Without these properties, the default clock rate
used would be 0, which can cause the UART ports to fail when open.

Fixes: 35f4e9d7 ("arm64: dts: imx8: split adma ss into dma and audio ss")
Signed-off-by: default avatarShenwei Wang <shenwei.wang@nxp.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 2b28fc68
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+8 −0
Original line number Diff line number Diff line
@@ -90,6 +90,8 @@ dma_subsys: bus@5a000000 {
		clocks = <&uart0_lpcg IMX_LPCG_CLK_4>,
			 <&uart0_lpcg IMX_LPCG_CLK_0>;
		clock-names = "ipg", "baud";
		assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
		assigned-clock-rates = <80000000>;
		power-domains = <&pd IMX_SC_R_UART_0>;
		status = "disabled";
	};
@@ -100,6 +102,8 @@ dma_subsys: bus@5a000000 {
		clocks = <&uart1_lpcg IMX_LPCG_CLK_4>,
			 <&uart1_lpcg IMX_LPCG_CLK_0>;
		clock-names = "ipg", "baud";
		assigned-clocks = <&clk IMX_SC_R_UART_1 IMX_SC_PM_CLK_PER>;
		assigned-clock-rates = <80000000>;
		power-domains = <&pd IMX_SC_R_UART_1>;
		status = "disabled";
	};
@@ -110,6 +114,8 @@ dma_subsys: bus@5a000000 {
		clocks = <&uart2_lpcg IMX_LPCG_CLK_4>,
			 <&uart2_lpcg IMX_LPCG_CLK_0>;
		clock-names = "ipg", "baud";
		assigned-clocks = <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>;
		assigned-clock-rates = <80000000>;
		power-domains = <&pd IMX_SC_R_UART_2>;
		status = "disabled";
	};
@@ -120,6 +126,8 @@ dma_subsys: bus@5a000000 {
		clocks = <&uart3_lpcg IMX_LPCG_CLK_4>,
			 <&uart3_lpcg IMX_LPCG_CLK_0>;
		clock-names = "ipg", "baud";
		assigned-clocks = <&clk IMX_SC_R_UART_3 IMX_SC_PM_CLK_PER>;
		assigned-clock-rates = <80000000>;
		power-domains = <&pd IMX_SC_R_UART_3>;
		status = "disabled";
	};