Commit c9e9ce0b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2022-03-03' of git://anongit.freedesktop.org/drm/drm-misc into drm-next 



drm-misc-next for v5.18:

UAPI Changes:

Cross-subsystem Changes:
- Improve performance of some fbdev ops, in some cases up to 6x faster.

Core Changes:
- Some small DP fixes.
- Find panels in subnodes of OF devices, and add of_get_drm_panel_display_mode
  to retrieve mode.
- Add drm_object_property_get_default_value and use it for resetting
  zpos in plane state reset, removing the need for individual drivers
  to do it.
- Same for color encoding and color range props.
- Update panic handling todo doc.
- Add todo that format conversion helpers should be sped up similarly to fbdev ops.

Driver Changes:
- Add panel orientation property to simpledrm for quirked panels.
- Assorted small fixes to tiny/repaper, nouveau, stm, omap, ssd130x.
- Add crc support to stm/ltdc.
- Add MIPI DBI compatible SPI driver
- Assorted small fixes to tiny panels and bridge drivers.
- Add AST2600 support to aspeed.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/48fabd78-ade9-f80b-c724-13726c7be69e@linux.intel.com
parents f298a2b9 701920ca

Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MIPI DBI SPI Panel



maintainers:

  - Noralf Trønnes <noralf@tronnes.org>



description: |

  This binding is for display panels using a MIPI DBI compatible controller

  in SPI mode.



  The MIPI Alliance Standard for Display Bus Interface defines the electrical

  and logical interfaces for display controllers historically used in mobile

  phones. The standard defines 4 display architecture types and this binding is

  for type 1 which has full frame memory. There are 3 interface types in the

  standard and type C is the serial interface.



  The standard defines the following interface signals for type C:

  - Power:

    - Vdd: Power supply for display module

    - Vddi: Logic level supply for interface signals

    Combined into one in this binding called: power-supply

  - Interface:

    - CSx: Chip select

    - SCL: Serial clock

    - Dout: Serial out

    - Din: Serial in

    - SDA: Bidrectional in/out

    - D/CX: Data/command selection, high=data, low=command

      Called dc-gpios in this binding.

    - RESX: Reset when low

      Called reset-gpios in this binding.



  The type C interface has 3 options:



    - Option 1: 9-bit mode and D/CX as the 9th bit

      |              Command              |  the next command or following data  |

      |<0><D7><D6><D5><D4><D3><D2><D1><D0>|<D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|



    - Option 2: 16-bit mode and D/CX as a 9th bit

      |              Command or data                              |

      |<X><X><X><X><X><X><X><D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|



    - Option 3: 8-bit mode and D/CX as a separate interface line

      |        Command or data         |

      |<D7><D6><D5><D4><D3><D2><D1><D0>|



  The panel resolution is specified using the panel-timing node properties

  hactive (width) and vactive (height). The other mandatory panel-timing

  properties should be set to zero except clock-frequency which can be

  optionally set to inform about the actual pixel clock frequency.



  If the panel is wired to the controller at an offset specify this using

  hback-porch (x-offset) and vback-porch (y-offset).



allOf:

  - $ref: panel-common.yaml#

  - $ref: /schemas/spi/spi-peripheral-props.yaml#



properties:

  compatible:

    items:

      - enum:

          - sainsmart18

      - const: panel-mipi-dbi-spi



  write-only:

    type: boolean

    description:

      Controller is not readable (ie. Din (MISO on the SPI interface) is not

      wired up).



  dc-gpios:

    maxItems: 1

    description: |

      Controller data/command selection (D/CX) in 4-line SPI mode.

      If not set, the controller is in 3-line SPI mode.



required:

  - compatible

  - reg

  - panel-timing



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/gpio/gpio.h>



    spi {

        #address-cells = <1>;

        #size-cells = <0>;



        display@0{

            compatible = "sainsmart18", "panel-mipi-dbi-spi";

            reg = <0>;

            spi-max-frequency = <40000000>;



            dc-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;

            reset-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;

            write-only;



            backlight = <&backlight>;



            width-mm = <35>;

            height-mm = <28>;



            panel-timing {

                hactive = <160>;

                vactive = <128>;

                hback-porch = <0>;

                vback-porch = <0>;

                clock-frequency = <0>;

                hfront-porch = <0>;

                hsync-len = <0>;

                vfront-porch = <0>;

                vsync-len = <0>;

            };

        };

    };



...

Documentation/gpu/todo.rst

+36 −11
Original line number Diff line number Diff line
@@ -241,6 +241,28 @@ Contact: Thomas Zimmermann <tzimmermann@suse.de>, Daniel Vetter 


Level: Advanced



Benchmark and optimize blitting and format-conversion function

--------------------------------------------------------------



Drawing to dispay memory quickly is crucial for many applications'

performance.



On at least x86-64, sys_imageblit() is significantly slower than

cfb_imageblit(), even though both use the same blitting algorithm and

the latter is written for I/O memory. It turns out that cfb_imageblit()

uses movl instructions, while sys_imageblit apparently does not. This

seems to be a problem with gcc's optimizer. DRM's format-conversion

helpers might be subject to similar issues.



Benchmark and optimize fbdev's sys_() helpers and DRM's format-conversion

helpers. In cases that can be further optimized, maybe implement a different

algorithm. For micro-optimizations, use movl/movq instructions explicitly.

That might possibly require architecture-specific helpers (e.g., storel()

storeq()).



Contact: Thomas Zimmermann <tzimmermann@suse.de>



Level: Intermediate



drm_framebuffer_funcs and drm_mode_config_funcs.fb_create cleanup

-----------------------------------------------------------------
@@ -475,8 +497,12 @@ This is a really varied tasks with lots of little bits and pieces: 
  achieved by using an IPI to the local processor.



* There's a massive confusion of different panic handlers. DRM fbdev emulation

  helpers have one, but on top of that the fbcon code itself also has one. We

  need to make sure that they stop fighting over each another.

  helpers had their own (long removed), but on top of that the fbcon code itself

  also has one. We need to make sure that they stop fighting over each other.

  This is worked around by checking ``oops_in_progress`` at various entry points

  into the DRM fbdev emulation helpers. A much cleaner approach here would be to

  switch fbcon to the `threaded printk support

  <https://lwn.net/Articles/800946/>`_.



* ``drm_can_sleep()`` is a mess. It hides real bugs in normal operations and

  isn't a full solution for panic paths. We need to make sure that it only
@@ -488,16 +514,15 @@ This is a really varied tasks with lots of little bits and pieces: 
  even spinlocks (because NMI and hardirq can panic too). We need to either

  make sure to not call such paths, or trylock everything. Really tricky.



* For the above locking troubles reasons it's pretty much impossible to

  attempt a synchronous modeset from panic handlers. The only thing we could

  try to achive is an atomic ``set_base`` of the primary plane, and hope that

  it shows up. Everything else probably needs to be delayed to some worker or

  something else which happens later on. Otherwise it just kills the box

  harder, prevent the panic from going out on e.g. netconsole.

* A clean solution would be an entirely separate panic output support in KMS,

  bypassing the current fbcon support. See `[PATCH v2 0/3] drm: Add panic handling

  <https://lore.kernel.org/dri-devel/20190311174218.51899-1-noralf@tronnes.org/>`_.



* There's also proposal for a simplied DRM console instead of the full-blown

  fbcon and DRM fbdev emulation. Any kind of panic handling tricks should

  obviously work for both console, in case we ever get kmslog merged.

* Encoding the actual oops and preceding dmesg in a QR might help with the

  dread "important stuff scrolled away" problem. See `[RFC][PATCH] Oops messages

  transfer using QR codes

  <https://lore.kernel.org/lkml/1446217392-11981-1-git-send-email-alexandru.murtaza@intel.com/>`_

  for some example code that could be reused.



Contact: Daniel Vetter

MAINTAINERS

+8 −0
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@@ -6112,6 +6112,14 @@ T: git git://anongit.freedesktop.org/drm/drm-misc 
F:	Documentation/devicetree/bindings/display/multi-inno,mi0283qt.txt

F:	drivers/gpu/drm/tiny/mi0283qt.c









DRM DRIVER FOR MIPI DBI compatible panels









M:	Noralf Trønnes <noralf@tronnes.org>









S:	Maintained









W:	https://github.com/notro/panel-mipi-dbi/wiki









T:	git git://anongit.freedesktop.org/drm/drm-misc









F:	Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml









F:	drivers/gpu/drm/tiny/panel-mipi-dbi.c

















DRM DRIVER FOR MSM ADRENO GPU









M:	Rob Clark <robdclark@gmail.com>









M:	Sean Paul <sean@poorly.run>
































drivers/gpu/drm/aspeed/aspeed_gfx.h



+1
−0






























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Diff line







@@ -12,6 +12,7 @@ struct aspeed_gfx {







	struct regmap			*scu;



















	u32				dac_reg;









	u32				int_clr_reg;









	u32				vga_scratch_reg;









	u32				throd_val;









	u32				scan_line_max;
































drivers/gpu/drm/aspeed/aspeed_gfx_drv.c



+14
−1






























Original line number
Diff line number
Diff line







@@ -61,6 +61,7 @@

















struct aspeed_gfx_config {









	u32 dac_reg;		/* DAC register in SCU */









	u32 int_clear_reg;	/* Interrupt clear register */









	u32 vga_scratch_reg;	/* VGA scratch register in SCU */









	u32 throd_val;		/* Default Threshold Seting */









	u32 scan_line_max;	/* Max memory size of one scan line */








@@ -68,6 +69,7 @@ struct aspeed_gfx_config {

















static const struct aspeed_gfx_config ast2400_config = {









	.dac_reg = 0x2c,









	.int_clear_reg = 0x60,









	.vga_scratch_reg = 0x50,









	.throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12),









	.scan_line_max = 64,








@@ -75,14 +77,24 @@ static const struct aspeed_gfx_config ast2400_config = {

















static const struct aspeed_gfx_config ast2500_config = {









	.dac_reg = 0x2c,









	.int_clear_reg = 0x60,









	.vga_scratch_reg = 0x50,









	.throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c),









	.scan_line_max = 128,









};



















static const struct aspeed_gfx_config ast2600_config = {









	.dac_reg = 0xc0,









	.int_clear_reg = 0x68,









	.vga_scratch_reg = 0x50,









	.throd_val = CRT_THROD_LOW(0x50) | CRT_THROD_HIGH(0x70),









	.scan_line_max = 128,









};



















static const struct of_device_id aspeed_gfx_match[] = {









	{ .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },









	{ .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },









	{ .compatible = "aspeed,ast2600-gfx", .data = &ast2600_config },









	{ },









};









MODULE_DEVICE_TABLE(of, aspeed_gfx_match);








@@ -120,7 +132,7 @@ static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)

















	if (reg & CRT_CTRL_VERTICAL_INTR_STS) {









		drm_crtc_handle_vblank(&priv->pipe.crtc);









		writel(reg, priv->base + CRT_CTRL1);









		writel(reg, priv->base + priv->int_clr_reg);









		return IRQ_HANDLED;









	}


















@@ -148,6 +160,7 @@ static int aspeed_gfx_load(struct drm_device *drm)







	config = match->data;



















	priv->dac_reg = config->dac_reg;









	priv->int_clr_reg = config->int_clear_reg;









	priv->vga_scratch_reg = config->vga_scratch_reg;









	priv->throd_val = config->throd_val;









	priv->scan_line_max = config->scan_line_max;