Commit c9bc1a0e authored by Dustin L. Howett's avatar Dustin L. Howett Committed by Tzung-Bi Shih
Browse files

platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first 



Some ChromeOS EC devices (such as the Framework Laptop) only map I/O
ports 0x800-0x807. Making the larger reservation required by the non-MEC
LPC (the 0xFF ports for the memory map, and the 0xFF ports for the
parameter region) is non-viable on these devices.

Since we probe the MEC EC first, we can get away with a smaller
reservation that covers the MEC EC ports. If we fall back to classic
LPC, we can grow the reservation to cover the memory map and the
parameter region.

cros_ec_lpc_probe also interacted with I/O ports 0x800-0x807 without a
reservation. Restructuring the code to request the MEC LPC region first
obviates the need to do so.

Signed-off-by: default avatarDustin L. Howett <dustin@howett.net>
Signed-off-by: default avatarTzung-Bi Shih <tzungbi@kernel.org>
Link: https://lore.kernel.org/r/20220217165930.15081-3-dustin@howett.net
parent 6a5d778e

drivers/platform/chrome/cros_ec_lpc.c

+26 −13
Original line number Diff line number Diff line
@@ -341,9 +341,14 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) 
	u8 buf[2];

	int irq, ret;



	if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,

				 dev_name(dev))) {

		dev_err(dev, "couldn't reserve memmap region\n");

	/*

	 * The Framework Laptop (and possibly other non-ChromeOS devices)

	 * only exposes the eight I/O ports that are required for the Microchip EC.

	 * Requesting a larger reservation will fail.

	 */

	if (!devm_request_region(dev, EC_HOST_CMD_REGION0,

				 EC_HOST_CMD_MEC_REGION_SIZE, dev_name(dev))) {

		dev_err(dev, "couldn't reserve MEC region\n");

		return -EBUSY;

	}
@@ -357,6 +362,12 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) 
	cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;

	cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);

	if (buf[0] != 'E' || buf[1] != 'C') {

		if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,

					 dev_name(dev))) {

			dev_err(dev, "couldn't reserve memmap region\n");

			return -EBUSY;

		}



		/* Re-assign read/write operations for the non MEC variant */

		cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;

		cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
@@ -366,11 +377,12 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) 
			dev_err(dev, "EC ID not detected\n");

			return -ENODEV;

		}

	}



	if (!devm_request_region(dev, EC_HOST_CMD_REGION0,

				 EC_HOST_CMD_REGION_SIZE, dev_name(dev))) {

		dev_err(dev, "couldn't reserve region0\n");

		/* Reserve the remaining I/O ports required by the non-MEC protocol. */

		if (!devm_request_region(dev, EC_HOST_CMD_REGION0 + EC_HOST_CMD_MEC_REGION_SIZE,

					 EC_HOST_CMD_REGION_SIZE - EC_HOST_CMD_MEC_REGION_SIZE,

					 dev_name(dev))) {

			dev_err(dev, "couldn't reserve remainder of region0\n");

			return -EBUSY;

		}

		if (!devm_request_region(dev, EC_HOST_CMD_REGION1,
@@ -378,6 +390,7 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) 
			dev_err(dev, "couldn't reserve region1\n");

			return -EBUSY;

		}

	}



	ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);

	if (!ec_dev)

include/linux/platform_data/cros_ec_commands.h

+7 −3
Original line number Diff line number Diff line
@@ -51,10 +51,14 @@ 
/*

 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff

 * and they tell the kernel that so we have to think of it as two parts.

 *

 * Other BIOSes report only the I/O port region spanned by the Microchip

 * MEC series EC; an attempt to address a larger region may fail.

 */

#define EC_HOST_CMD_REGION0       0x800

#define EC_HOST_CMD_REGION1       0x880

#define EC_HOST_CMD_REGION_SIZE    0x80

#define EC_HOST_CMD_MEC_REGION_SIZE 0x8



/* EC command register bit functions */

#define EC_LPC_CMDR_DATA	BIT(0)  /* Data ready for host to read */