Commit c970d420 authored by Taehee Yoo's avatar Taehee Yoo Committed by Herbert Xu
Browse files

crypto: x86/aria - implement aria-avx512 



aria-avx512 implementation uses AVX512 and GFNI.
It supports 64way parallel processing.
So, byteslicing code is changed to support 64way parallel.
And it exports some aria-avx2 functions such as encrypt() and decrypt().

AVX and AVX2 have 16 registers.
They should use memory to store/load state because of lack of registers.
But AVX512 supports 32 registers.
So, it doesn't require store/load in the s-box layer.
It means that it can reduce overhead of store/load in the s-box layer.
Also code become much simpler.

Benchmark with modprobe tcrypt mode=610 num_mb=8192, i3-12100:

ARIA-AVX512(128bit and 256bit)
    testing speed of multibuffer ecb(aria) (ecb-aria-avx512) encryption
tcrypt: 1 operation in 1504 cycles (1024 bytes)
tcrypt: 1 operation in 4595 cycles (4096 bytes)
tcrypt: 1 operation in 1763 cycles (1024 bytes)
tcrypt: 1 operation in 5540 cycles (4096 bytes)
    testing speed of multibuffer ecb(aria) (ecb-aria-avx512) decryption
tcrypt: 1 operation in 1502 cycles (1024 bytes)
tcrypt: 1 operation in 4615 cycles (4096 bytes)
tcrypt: 1 operation in 1759 cycles (1024 bytes)
tcrypt: 1 operation in 5554 cycles (4096 bytes)

ARIA-AVX2 with GFNI(128bit and 256bit)
    testing speed of multibuffer ecb(aria) (ecb-aria-avx2) encryption
tcrypt: 1 operation in 2003 cycles (1024 bytes)
tcrypt: 1 operation in 5867 cycles (4096 bytes)
tcrypt: 1 operation in 2358 cycles (1024 bytes)
tcrypt: 1 operation in 7295 cycles (4096 bytes)
    testing speed of multibuffer ecb(aria) (ecb-aria-avx2) decryption
tcrypt: 1 operation in 2004 cycles (1024 bytes)
tcrypt: 1 operation in 5956 cycles (4096 bytes)
tcrypt: 1 operation in 2409 cycles (1024 bytes)
tcrypt: 1 operation in 7564 cycles (4096 bytes)

Signed-off-by: default avatarTaehee Yoo <ap420073@gmail.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 37d8d3ae

arch/x86/crypto/Kconfig

+19 −0
Original line number Diff line number Diff line
@@ -323,6 +323,25 @@ config CRYPTO_ARIA_AESNI_AVX2_X86_64 


	  Processes 32 blocks in parallel.



config CRYPTO_ARIA_GFNI_AVX512_X86_64

	tristate "Ciphers: ARIA with modes: ECB, CTR (AVX512/GFNI)"

	depends on X86 && 64BIT

	select CRYPTO_SKCIPHER

	select CRYPTO_SIMD

	select CRYPTO_ALGAPI

	select CRYPTO_ARIA

	select CRYPTO_ARIA_AESNI_AVX_X86_64

	select CRYPTO_ARIA_AESNI_AVX2_X86_64

	help

	  Length-preserving cipher: ARIA cipher algorithms

	  (RFC 5794) with ECB and CTR modes



	  Architecture: x86_64 using:

	  - AVX512 (Advanced Vector Extensions)

	  - GFNI (Galois Field New Instructions)



	  Processes 64 blocks in parallel.



config CRYPTO_CHACHA20_X86_64

	tristate "Ciphers: ChaCha20, XChaCha20, XChaCha12 (SSSE3/AVX2/AVX-512VL)"

	depends on X86 && 64BIT

arch/x86/crypto/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -106,6 +106,9 @@ aria-aesni-avx-x86_64-y := aria-aesni-avx-asm_64.o aria_aesni_avx_glue.o 
obj-$(CONFIG_CRYPTO_ARIA_AESNI_AVX2_X86_64) += aria-aesni-avx2-x86_64.o

aria-aesni-avx2-x86_64-y := aria-aesni-avx2-asm_64.o aria_aesni_avx2_glue.o



obj-$(CONFIG_CRYPTO_ARIA_GFNI_AVX512_X86_64) += aria-gfni-avx512-x86_64.o

aria-gfni-avx512-x86_64-y := aria-gfni-avx512-asm_64.o aria_gfni_avx512_glue.o



quiet_cmd_perlasm = PERLASM $@

      cmd_perlasm = $(PERL) $< > $@

$(obj)/%.S: $(src)/%.pl FORCE

arch/x86/crypto/aria-avx.h

+8 −0
Original line number Diff line number Diff line
@@ -10,6 +10,9 @@ 
#define ARIA_AESNI_AVX2_PARALLEL_BLOCKS 32

#define ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE  (ARIA_BLOCK_SIZE * ARIA_AESNI_AVX2_PARALLEL_BLOCKS)



#define ARIA_GFNI_AVX512_PARALLEL_BLOCKS 64

#define ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE  (ARIA_BLOCK_SIZE * ARIA_GFNI_AVX512_PARALLEL_BLOCKS)



asmlinkage void aria_aesni_avx_encrypt_16way(const void *ctx, u8 *dst,

					     const u8 *src);

asmlinkage void aria_aesni_avx_decrypt_16way(const void *ctx, u8 *dst,
@@ -49,6 +52,11 @@ struct aria_avx_ops { 
	void (*aria_decrypt_32way)(const void *ctx, u8 *dst, const u8 *src);

	void (*aria_ctr_crypt_32way)(const void *ctx, u8 *dst, const u8 *src,

				     u8 *keystream, u8 *iv);

	void (*aria_encrypt_64way)(const void *ctx, u8 *dst, const u8 *src);

	void (*aria_decrypt_64way)(const void *ctx, u8 *dst, const u8 *src);

	void (*aria_ctr_crypt_64way)(const void *ctx, u8 *dst, const u8 *src,

				     u8 *keystream, u8 *iv);





};

#endif

arch/x86/crypto/aria-gfni-avx512-asm_64.S

0 → 100644
+971 −0

File added.

Preview size limit exceeded, changes collapsed.

arch/x86/crypto/aria_gfni_avx512_glue.c

0 → 100644
+250 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * Glue Code for the AVX512/GFNI assembler implementation of the ARIA Cipher

 *

 * Copyright (c) 2022 Taehee Yoo <ap420073@gmail.com>

 */



#include <crypto/algapi.h>

#include <crypto/internal/simd.h>

#include <crypto/aria.h>

#include <linux/crypto.h>

#include <linux/err.h>

#include <linux/module.h>

#include <linux/types.h>



#include "ecb_cbc_helpers.h"

#include "aria-avx.h"



asmlinkage void aria_gfni_avx512_encrypt_64way(const void *ctx, u8 *dst,

					       const u8 *src);

asmlinkage void aria_gfni_avx512_decrypt_64way(const void *ctx, u8 *dst,

					       const u8 *src);

asmlinkage void aria_gfni_avx512_ctr_crypt_64way(const void *ctx, u8 *dst,

						 const u8 *src,

						 u8 *keystream, u8 *iv);



static struct aria_avx_ops aria_ops;



struct aria_avx512_request_ctx {

	u8 keystream[ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE];

};



static int ecb_do_encrypt(struct skcipher_request *req, const u32 *rkey)

{

	ECB_WALK_START(req, ARIA_BLOCK_SIZE, ARIA_AESNI_PARALLEL_BLOCKS);

	ECB_BLOCK(ARIA_GFNI_AVX512_PARALLEL_BLOCKS, aria_ops.aria_encrypt_64way);

	ECB_BLOCK(ARIA_AESNI_AVX2_PARALLEL_BLOCKS, aria_ops.aria_encrypt_32way);

	ECB_BLOCK(ARIA_AESNI_PARALLEL_BLOCKS, aria_ops.aria_encrypt_16way);

	ECB_BLOCK(1, aria_encrypt);

	ECB_WALK_END();

}



static int ecb_do_decrypt(struct skcipher_request *req, const u32 *rkey)

{

	ECB_WALK_START(req, ARIA_BLOCK_SIZE, ARIA_AESNI_PARALLEL_BLOCKS);

	ECB_BLOCK(ARIA_GFNI_AVX512_PARALLEL_BLOCKS, aria_ops.aria_decrypt_64way);

	ECB_BLOCK(ARIA_AESNI_AVX2_PARALLEL_BLOCKS, aria_ops.aria_decrypt_32way);

	ECB_BLOCK(ARIA_AESNI_PARALLEL_BLOCKS, aria_ops.aria_decrypt_16way);

	ECB_BLOCK(1, aria_decrypt);

	ECB_WALK_END();

}



static int aria_avx512_ecb_encrypt(struct skcipher_request *req)

{

	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);

	struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);



	return ecb_do_encrypt(req, ctx->enc_key[0]);

}



static int aria_avx512_ecb_decrypt(struct skcipher_request *req)

{

	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);

	struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);



	return ecb_do_decrypt(req, ctx->dec_key[0]);

}



static int aria_avx512_set_key(struct crypto_skcipher *tfm, const u8 *key,

			    unsigned int keylen)

{

	return aria_set_key(&tfm->base, key, keylen);

}



static int aria_avx512_ctr_encrypt(struct skcipher_request *req)

{

	struct aria_avx512_request_ctx *req_ctx = skcipher_request_ctx(req);

	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);

	struct aria_ctx *ctx = crypto_skcipher_ctx(tfm);

	struct skcipher_walk walk;

	unsigned int nbytes;

	int err;



	err = skcipher_walk_virt(&walk, req, false);



	while ((nbytes = walk.nbytes) > 0) {

		const u8 *src = walk.src.virt.addr;

		u8 *dst = walk.dst.virt.addr;



		while (nbytes >= ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE) {

			kernel_fpu_begin();

			aria_ops.aria_ctr_crypt_64way(ctx, dst, src,

						      &req_ctx->keystream[0],

						      walk.iv);

			kernel_fpu_end();

			dst += ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE;

			src += ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE;

			nbytes -= ARIA_GFNI_AVX512_PARALLEL_BLOCK_SIZE;

		}



		while (nbytes >= ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE) {

			kernel_fpu_begin();

			aria_ops.aria_ctr_crypt_32way(ctx, dst, src,

						      &req_ctx->keystream[0],

						      walk.iv);

			kernel_fpu_end();

			dst += ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE;

			src += ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE;

			nbytes -= ARIA_AESNI_AVX2_PARALLEL_BLOCK_SIZE;

		}



		while (nbytes >= ARIA_AESNI_PARALLEL_BLOCK_SIZE) {

			kernel_fpu_begin();

			aria_ops.aria_ctr_crypt_16way(ctx, dst, src,

						      &req_ctx->keystream[0],

						      walk.iv);

			kernel_fpu_end();

			dst += ARIA_AESNI_PARALLEL_BLOCK_SIZE;

			src += ARIA_AESNI_PARALLEL_BLOCK_SIZE;

			nbytes -= ARIA_AESNI_PARALLEL_BLOCK_SIZE;

		}



		while (nbytes >= ARIA_BLOCK_SIZE) {

			memcpy(&req_ctx->keystream[0], walk.iv,

			       ARIA_BLOCK_SIZE);

			crypto_inc(walk.iv, ARIA_BLOCK_SIZE);



			aria_encrypt(ctx, &req_ctx->keystream[0],

				     &req_ctx->keystream[0]);



			crypto_xor_cpy(dst, src, &req_ctx->keystream[0],

				       ARIA_BLOCK_SIZE);

			dst += ARIA_BLOCK_SIZE;

			src += ARIA_BLOCK_SIZE;

			nbytes -= ARIA_BLOCK_SIZE;

		}



		if (walk.nbytes == walk.total && nbytes > 0) {

			memcpy(&req_ctx->keystream[0], walk.iv,

			       ARIA_BLOCK_SIZE);

			crypto_inc(walk.iv, ARIA_BLOCK_SIZE);



			aria_encrypt(ctx, &req_ctx->keystream[0],

				     &req_ctx->keystream[0]);



			crypto_xor_cpy(dst, src, &req_ctx->keystream[0],

				       nbytes);

			dst += nbytes;

			src += nbytes;

			nbytes = 0;

		}

		err = skcipher_walk_done(&walk, nbytes);

	}



	return err;

}



static int aria_avx512_init_tfm(struct crypto_skcipher *tfm)

{

	crypto_skcipher_set_reqsize(tfm,

				    sizeof(struct aria_avx512_request_ctx));



	return 0;

}



static struct skcipher_alg aria_algs[] = {

	{

		.base.cra_name		= "__ecb(aria)",

		.base.cra_driver_name	= "__ecb-aria-avx512",

		.base.cra_priority	= 600,

		.base.cra_flags		= CRYPTO_ALG_INTERNAL,

		.base.cra_blocksize	= ARIA_BLOCK_SIZE,

		.base.cra_ctxsize	= sizeof(struct aria_ctx),

		.base.cra_module	= THIS_MODULE,

		.min_keysize		= ARIA_MIN_KEY_SIZE,

		.max_keysize		= ARIA_MAX_KEY_SIZE,

		.setkey			= aria_avx512_set_key,

		.encrypt		= aria_avx512_ecb_encrypt,

		.decrypt		= aria_avx512_ecb_decrypt,

	}, {

		.base.cra_name		= "__ctr(aria)",

		.base.cra_driver_name	= "__ctr-aria-avx512",

		.base.cra_priority	= 600,

		.base.cra_flags		= CRYPTO_ALG_INTERNAL |

					  CRYPTO_ALG_SKCIPHER_REQSIZE_LARGE,

		.base.cra_blocksize	= 1,

		.base.cra_ctxsize	= sizeof(struct aria_ctx),

		.base.cra_module	= THIS_MODULE,

		.min_keysize		= ARIA_MIN_KEY_SIZE,

		.max_keysize		= ARIA_MAX_KEY_SIZE,

		.ivsize			= ARIA_BLOCK_SIZE,

		.chunksize		= ARIA_BLOCK_SIZE,

		.setkey			= aria_avx512_set_key,

		.encrypt		= aria_avx512_ctr_encrypt,

		.decrypt		= aria_avx512_ctr_encrypt,

		.init                   = aria_avx512_init_tfm,

	}

};



static struct simd_skcipher_alg *aria_simd_algs[ARRAY_SIZE(aria_algs)];



static int __init aria_avx512_init(void)

{

	const char *feature_name;



	if (!boot_cpu_has(X86_FEATURE_AVX) ||

	    !boot_cpu_has(X86_FEATURE_AVX2) ||

	    !boot_cpu_has(X86_FEATURE_AVX512F) ||

	    !boot_cpu_has(X86_FEATURE_AVX512VL) ||

	    !boot_cpu_has(X86_FEATURE_GFNI) ||

	    !boot_cpu_has(X86_FEATURE_OSXSAVE)) {

		pr_info("AVX512/GFNI instructions are not detected.\n");

		return -ENODEV;

	}



	if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM |

			       XFEATURE_MASK_AVX512, &feature_name)) {

		pr_info("CPU feature '%s' is not supported.\n", feature_name);

		return -ENODEV;

	}



	aria_ops.aria_encrypt_16way = aria_aesni_avx_gfni_encrypt_16way;

	aria_ops.aria_decrypt_16way = aria_aesni_avx_gfni_decrypt_16way;

	aria_ops.aria_ctr_crypt_16way = aria_aesni_avx_gfni_ctr_crypt_16way;

	aria_ops.aria_encrypt_32way = aria_aesni_avx2_gfni_encrypt_32way;

	aria_ops.aria_decrypt_32way = aria_aesni_avx2_gfni_decrypt_32way;

	aria_ops.aria_ctr_crypt_32way = aria_aesni_avx2_gfni_ctr_crypt_32way;

	aria_ops.aria_encrypt_64way = aria_gfni_avx512_encrypt_64way;

	aria_ops.aria_decrypt_64way = aria_gfni_avx512_decrypt_64way;

	aria_ops.aria_ctr_crypt_64way = aria_gfni_avx512_ctr_crypt_64way;



	return simd_register_skciphers_compat(aria_algs,

					      ARRAY_SIZE(aria_algs),

					      aria_simd_algs);

}



static void __exit aria_avx512_exit(void)

{

	simd_unregister_skciphers(aria_algs, ARRAY_SIZE(aria_algs),

				  aria_simd_algs);

}



module_init(aria_avx512_init);

module_exit(aria_avx512_exit);



MODULE_LICENSE("GPL");

MODULE_AUTHOR("Taehee Yoo <ap420073@gmail.com>");

MODULE_DESCRIPTION("ARIA Cipher Algorithm, AVX512/GFNI optimized");

MODULE_ALIAS_CRYPTO("aria");

MODULE_ALIAS_CRYPTO("aria-gfni-avx512");