Unverified Commit c93a5cd3 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!2863 Support some dfx for hns3 

Merge Pull Request from: @svishen 
 
This pr add support some dfx way for hns3:

(1)Support dump pfc frame statistics in tx timeout log
(2)Dump more reg info base on ras mod before reset, which is useful to analyze the ras error.
(3)Add support for page_pool_get_stats, then the hns3 driver can get page pool statistics by ethtool.
(4)hns3 driver does not have the trace of the command queue. As a result, it is difficult to locate the communication between the driver and firmware. Therefore, the trace function of the command queue is added in this test case to facilitate the locating of communication problems between the driver and firmware.

issue:
https://gitee.com/openeuler/kernel/issues/I8GK5Q 
 
Link:https://gitee.com/openeuler/kernel/pulls/2863

 

Reviewed-by: default avatarKe Chen <chenke54@huawei.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents 423b2799 7906c655

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+6 −0
Original line number Diff line number Diff line
@@ -140,6 +140,7 @@ enum HNAE3_DEV_CAP_BITS { 
	HNAE3_DEV_SUPPORT_VF_FAULT_B,

	HNAE3_DEV_SUPPORT_NOTIFY_PKT_B,

	HNAE3_DEV_SUPPORT_TM_FLUSH_B,

	HNAE3_DEV_SUPPORT_ERR_MOD_GEN_REG_B,

};



#define hnae3_ae_dev_fd_supported(ae_dev) \
@@ -217,6 +218,9 @@ enum HNAE3_DEV_CAP_BITS { 
#define hnae3_ae_dev_tm_flush_supported(hdev) \

	test_bit(HNAE3_DEV_SUPPORT_TM_FLUSH_B, (hdev)->ae_dev->caps)



#define hnae3_ae_dev_gen_reg_dfx_supported(hdev) \

	test_bit(HNAE3_DEV_SUPPORT_ERR_MOD_GEN_REG_B, (hdev)->ae_dev->caps)



enum HNAE3_PF_CAP_BITS {

	HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,

};
@@ -241,6 +245,8 @@ struct hnae3_queue { 
struct hns3_mac_stats {

	u64 tx_pause_cnt;

	u64 rx_pause_cnt;

	u64 tx_pfc_cnt;

	u64 rx_pfc_cnt;

};



/* hnae3 loop mode */

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c

+5 −0
Original line number Diff line number Diff line
@@ -158,6 +158,7 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { 
	{HCLGE_COMM_CAP_VF_FAULT_B, HNAE3_DEV_SUPPORT_VF_FAULT_B},

	{HCLGE_COMM_CAP_NOTIFY_PKT_B, HNAE3_DEV_SUPPORT_NOTIFY_PKT_B},

	{HCLGE_COMM_CAP_TM_FLUSH_B, HNAE3_DEV_SUPPORT_TM_FLUSH_B},

	{HCLGE_COMM_CAP_ERR_MOD_GEN_REG_B, HNAE3_DEV_SUPPORT_ERR_MOD_GEN_REG_B},

};



static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = {
@@ -473,6 +474,8 @@ int hclge_comm_cmd_send(struct hclge_comm_hw *hw, struct hclge_desc *desc, 
	struct hclge_comm_cmq_ring *csq = &hw->cmq.csq;

	int ret;

	int ntc;

	trace_hclge_comm_cmd_send(hw, desc, num,

				  hclge_comm_is_special_opcode(desc->opcode));



	spin_lock_bh(&hw->cmq.csq.lock);
@@ -507,6 +510,8 @@ int hclge_comm_cmd_send(struct hclge_comm_hw *hw, struct hclge_desc *desc, 


	spin_unlock_bh(&hw->cmq.csq.lock);



	trace_hclge_comm_cmd_get(hw, desc, num,

				 hclge_comm_is_special_opcode(desc->opcode));

	return ret;

}

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h

+8 −0
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ enum hclge_opcode_type { 
	HCLGE_OPC_DFX_RCB_REG		= 0x004D,

	HCLGE_OPC_DFX_TQP_REG		= 0x004E,

	HCLGE_OPC_DFX_SSU_REG_2		= 0x004F,

	HCLGE_OPC_DFX_GEN_REG		= 0x7038,



	HCLGE_OPC_QUERY_DEV_SPECS	= 0x0050,

	HCLGE_OPC_GET_QUEUE_ERR_VF      = 0x0067,
@@ -363,6 +364,7 @@ enum HCLGE_COMM_CAP_BITS { 
	HCLGE_COMM_CAP_WOL_B = 28,

	HCLGE_COMM_CAP_NOTIFY_PKT_B = 29,

	HCLGE_COMM_CAP_TM_FLUSH_B = 31,

	HCLGE_COMM_CAP_ERR_MOD_GEN_REG_B = 32,

};



enum HCLGE_COMM_API_CAP_BITS {
@@ -489,5 +491,11 @@ int hclge_comm_cmd_queue_init(struct pci_dev *pdev, struct hclge_comm_hw *hw); 
int hclge_comm_cmd_init(struct hnae3_ae_dev *ae_dev, struct hclge_comm_hw *hw,

			u32 *fw_version, bool is_pf,

			unsigned long reset_pending);

void trace_hclge_comm_cmd_send(struct hclge_comm_hw *hw,

			       struct hclge_desc *desc,

			       int num, int is_special);

void trace_hclge_comm_cmd_get(struct hclge_comm_hw *hw,

			      struct hclge_desc *desc,

			      int num, int is_special);



#endif

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+9 −2
Original line number Diff line number Diff line
@@ -3132,8 +3132,10 @@ static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev) 
		struct hns3_mac_stats mac_stats;



		h->ae_algo->ops->get_mac_stats(h, &mac_stats);

		netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",

			    mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);

		netdev_info(ndev,

			    "tx_pause_cnt: %llu, rx_pause_cnt: %llu, tx_pfc_cnt: %llu, rx_pfc_cnt: %llu\n",

			    mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt,

			    mac_stats.tx_pfc_cnt, mac_stats.rx_pfc_cnt);

	}



	hns3_dump_queue_reg(ndev, tx_ring);
@@ -5288,6 +5290,11 @@ static void hns3_alloc_page_pool(struct hns3_enet_ring *ring) 
	}

}



bool hns3_is_page_pool_enabled(void)

{

	return page_pool_enabled;

}



static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)

{

	int ret;

drivers/net/ethernet/hisilicon/hns3/hns3_enet.h

+1 −0
Original line number Diff line number Diff line
@@ -819,4 +819,5 @@ void hns3_cq_period_mode_init(struct hns3_nic_priv *priv, 


void hns3_external_lb_prepare(struct net_device *ndev, bool if_running);

void hns3_external_lb_restore(struct net_device *ndev, bool if_running);

bool hns3_is_page_pool_enabled(void);

#endif