Commit c931d495 authored by Ludovic Barre's avatar Ludovic Barre Committed by Ulf Hansson
Browse files

mmc: mmci: add datactrl block size variant property 



This patch allows to define a datactrl block size
by variant, requested by STM32 sdmmc variant.

Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent cd3ee8c5

drivers/mmc/host/mmci.c

+11 −2
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ static struct variant_data variant_arm = { 
	.fifosize		= 16 * 4,

	.fifohalfsize		= 8 * 4,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 100000000,

	.reversed_irq_handling	= true,
@@ -70,6 +71,7 @@ static struct variant_data variant_arm_extended_fifo = { 
	.fifosize		= 128 * 4,

	.fifohalfsize		= 64 * 4,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 100000000,

	.mmcimask1		= true,
@@ -83,6 +85,7 @@ static struct variant_data variant_arm_extended_fifo_hwfc = { 
	.fifohalfsize		= 64 * 4,

	.clkreg_enable		= MCI_ARM_HWFCEN,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 100000000,

	.mmcimask1		= true,
@@ -97,6 +100,7 @@ static struct variant_data variant_u300 = { 
	.clkreg_enable		= MCI_ST_U300_HWFCEN,

	.clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS,

	.datalength_bits	= 16,

	.datactrl_blocksz	= 11,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio			= true,

	.pwrreg_powerup		= MCI_PWR_ON,
@@ -116,6 +120,7 @@ static struct variant_data variant_nomadik = { 
	.clkreg			= MCI_CLK_ENABLE,

	.clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,
@@ -138,6 +143,7 @@ static struct variant_data variant_ux500 = { 
	.clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS,

	.clkreg_neg_edge_enable	= MCI_ST_UX500_NEG_EDGE,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,
@@ -165,6 +171,7 @@ static struct variant_data variant_ux500v2 = { 
	.clkreg_neg_edge_enable	= MCI_ST_UX500_NEG_EDGE,

	.datactrl_mask_ddrmode	= MCI_DPSM_ST_DDRMODE,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,
@@ -192,6 +199,7 @@ static struct variant_data variant_stm32 = { 
	.clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS,

	.clkreg_neg_edge_enable	= MCI_ST_UX500_NEG_EDGE,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.datactrl_mask_sdio	= MCI_DPSM_ST_SDIOEN,

	.st_sdio		= true,

	.st_clkdiv		= true,
@@ -213,6 +221,7 @@ static struct variant_data variant_qcom = { 
	.data_cmd_enable	= MCI_CPSM_QCOM_DATCMD,

	.blksz_datactrl4	= true,

	.datalength_bits	= 24,

	.datactrl_blocksz	= 11,

	.pwrreg_powerup		= MCI_PWR_UP,

	.f_max			= 208000000,

	.explicit_mclk_control	= true,
@@ -1861,13 +1870,13 @@ static int mmci_probe(struct amba_device *dev, 
	/*

	 * Block size can be up to 2048 bytes, but must be a power of two.

	 */

	mmc->max_blk_size = 1 << 11;

	mmc->max_blk_size = 1 << variant->datactrl_blocksz;



	/*

	 * Limit the number of blocks transferred so that we don't overflow

	 * the maximum request size.

	 */

	mmc->max_blk_count = mmc->max_req_size >> 11;

	mmc->max_blk_count = mmc->max_req_size >> variant->datactrl_blocksz;



	spin_lock_init(&host->lock);

drivers/mmc/host/mmci.h

+2 −0
Original line number Diff line number Diff line
@@ -217,6 +217,7 @@ struct mmci_host; 
 * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl

 *		     register

 * @datactrl_mask_sdio: SDIO enable mask in datactrl register

 * @datactrl_blksz: block size in power of two

 * @pwrreg_powerup: power up value for MMCIPOWER register

 * @f_max: maximum clk frequency supported by the controller.

 * @signal_direction: input/out direction of bus signals can be indicated
@@ -248,6 +249,7 @@ struct variant_data { 
	unsigned int		data_cmd_enable;

	unsigned int		datactrl_mask_ddrmode;

	unsigned int		datactrl_mask_sdio;

	unsigned int		datactrl_blocksz;

	u8			st_sdio:1;

	u8			st_clkdiv:1;

	u8			blksz_datactrl16:1;