Commit c92c36ed authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
Browse files

drm/i915/gt: Move submission_method into intel_gt



Since we setup the submission method for the engines once, it is easy to
assign an enum and use that instead of probing into the backends.

Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20210521183215.65451-3-matthew.brost@intel.com
parent 0db3633f
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+7 −1
Original line number Diff line number Diff line
@@ -13,8 +13,9 @@
#include "i915_reg.h"
#include "i915_request.h"
#include "i915_selftest.h"
#include "gt/intel_timeline.h"
#include "intel_engine_types.h"
#include "intel_gt_types.h"
#include "intel_timeline.h"
#include "intel_workarounds.h"

struct drm_printer;
@@ -262,6 +263,11 @@ void intel_engine_init_active(struct intel_engine_cs *engine,
#define ENGINE_MOCK	1
#define ENGINE_VIRTUAL	2

static inline bool intel_engine_uses_guc(const struct intel_engine_cs *engine)
{
	return engine->gt->submission_method >= INTEL_SUBMISSION_GUC;
}

static inline bool
intel_engine_has_preempt_reset(const struct intel_engine_cs *engine)
{
+8 −4
Original line number Diff line number Diff line
@@ -909,12 +909,16 @@ int intel_engines_init(struct intel_gt *gt)
	enum intel_engine_id id;
	int err;

	if (intel_uc_uses_guc_submission(&gt->uc))
	if (intel_uc_uses_guc_submission(&gt->uc)) {
		gt->submission_method = INTEL_SUBMISSION_GUC;
		setup = intel_guc_submission_setup;
	else if (HAS_EXECLISTS(gt->i915))
	} else if (HAS_EXECLISTS(gt->i915)) {
		gt->submission_method = INTEL_SUBMISSION_ELSP;
		setup = intel_execlists_submission_setup;
	else
	} else {
		gt->submission_method = INTEL_SUBMISSION_RING;
		setup = intel_ring_submission_setup;
	}

	for_each_engine(engine, gt, id) {
		err = engine_setup_common(engine);
@@ -1479,7 +1483,7 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine,
		drm_printf(m, "\tIPEHR: 0x%08x\n", ENGINE_READ(engine, IPEHR));
	}

	if (intel_engine_in_guc_submission_mode(engine)) {
	if (intel_engine_uses_guc(engine)) {
		/* nothing to print yet */
	} else if (HAS_EXECLISTS(dev_priv)) {
		struct i915_request * const *port, *rq;
+0 −8
Original line number Diff line number Diff line
@@ -1768,7 +1768,6 @@ process_csb(struct intel_engine_cs *engine, struct i915_request **inactive)
	 */
	GEM_BUG_ON(!tasklet_is_locked(&execlists->tasklet) &&
		   !reset_in_progress(execlists));
	GEM_BUG_ON(!intel_engine_in_execlists_submission_mode(engine));

	/*
	 * Note that csb_write, csb_status may be either in HWSP or mmio.
@@ -3884,13 +3883,6 @@ void intel_execlists_show_requests(struct intel_engine_cs *engine,
	spin_unlock_irqrestore(&engine->active.lock, flags);
}

bool
intel_engine_in_execlists_submission_mode(const struct intel_engine_cs *engine)
{
	return engine->set_default_submission ==
	       execlists_set_default_submission;
}

#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftest_execlists.c"
#endif
+0 −3
Original line number Diff line number Diff line
@@ -43,7 +43,4 @@ int intel_virtual_engine_attach_bond(struct intel_engine_cs *engine,
				     const struct intel_engine_cs *master,
				     const struct intel_engine_cs *sibling);

bool
intel_engine_in_execlists_submission_mode(const struct intel_engine_cs *engine);

#endif /* __INTEL_EXECLISTS_SUBMISSION_H__ */
+7 −0
Original line number Diff line number Diff line
@@ -31,6 +31,12 @@ struct i915_ggtt;
struct intel_engine_cs;
struct intel_uncore;

enum intel_submission_method {
	INTEL_SUBMISSION_RING,
	INTEL_SUBMISSION_ELSP,
	INTEL_SUBMISSION_GUC,
};

struct intel_gt {
	struct drm_i915_private *i915;
	struct intel_uncore *uncore;
@@ -118,6 +124,7 @@ struct intel_gt {
	struct intel_engine_cs *engine[I915_NUM_ENGINES];
	struct intel_engine_cs *engine_class[MAX_ENGINE_CLASS + 1]
					    [MAX_ENGINE_INSTANCE + 1];
	enum intel_submission_method submission_method;

	/*
	 * Default address space (either GGTT or ppGTT depending on arch).
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