Commit c929ac60 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: allow just single IRQ callback 



DPU interrupts code allows multiple callbacks per interrut. In reality
none of the interrupts is shared between blocks (and will probably never
be). Drop support for registering multiple callbacks per interrupt to
simplify interrupt handling code.

Reported-by: default avatarkernel test robot <lkp@intel.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarStephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/474701/
Link: https://lore.kernel.org/r/20220217043148.480898-4-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 52db0f2b

drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.h

+5 −11
Original line number Diff line number Diff line
@@ -44,10 +44,8 @@ u32 dpu_core_irq_read( 
 *                             interrupt

 * @dpu_kms:		DPU handle

 * @irq_idx:		irq index

 * @irq_cb:		IRQ callback structure, containing callback function

 *			and argument. Passing NULL for irq_cb will unregister

 *			the callback for the given irq_idx

 *			This must exist until un-registration.

 * @irq_cb:		IRQ callback funcion.

 * @irq_arg:		IRQ callback argument.

 * @return:		0 for success registering callback, otherwise failure

 *

 * This function supports registration of multiple callbacks for each interrupt.
@@ -55,25 +53,21 @@ u32 dpu_core_irq_read( 
int dpu_core_irq_register_callback(

		struct dpu_kms *dpu_kms,

		int irq_idx,

		struct dpu_irq_callback *irq_cb);

		void (*irq_cb)(void *arg, int irq_idx),

		void *irq_arg);



/**

 * dpu_core_irq_unregister_callback - For unregistering callback function on IRQ

 *                             interrupt

 * @dpu_kms:		DPU handle

 * @irq_idx:		irq index

 * @irq_cb:		IRQ callback structure, containing callback function

 *			and argument. Passing NULL for irq_cb will unregister

 *			the callback for the given irq_idx

 *			This must match with registration.

 * @return:		0 for success registering callback, otherwise failure

 *

 * This function supports registration of multiple callbacks for each interrupt.

 */

int dpu_core_irq_unregister_callback(

		struct dpu_kms *dpu_kms,

		int irq_idx,

		struct dpu_irq_callback *irq_cb);

		int irq_idx);



/**

 * dpu_debugfs_core_irq_init - register core irq debugfs

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+3 −4
Original line number Diff line number Diff line
@@ -328,7 +328,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, 
				      phys_enc->hw_pp->idx - PINGPONG_0,

				      atomic_read(wait_info->atomic_cnt));

			local_irq_save(flags);

			irq->cb.func(phys_enc, irq->irq_idx);

			irq->func(phys_enc, irq->irq_idx);

			local_irq_restore(flags);

			ret = 0;

		} else {
@@ -369,7 +369,7 @@ int dpu_encoder_helper_register_irq(struct dpu_encoder_phys *phys_enc, 
	}



	ret = dpu_core_irq_register_callback(phys_enc->dpu_kms, irq->irq_idx,

			&irq->cb);

			irq->func, phys_enc);

	if (ret) {

		DPU_ERROR_PHYS(phys_enc,

			"failed to register IRQ callback for %s\n",
@@ -400,8 +400,7 @@ int dpu_encoder_helper_unregister_irq(struct dpu_encoder_phys *phys_enc, 
		return 0;

	}



	ret = dpu_core_irq_unregister_callback(phys_enc->dpu_kms, irq->irq_idx,

			&irq->cb);

	ret = dpu_core_irq_unregister_callback(phys_enc->dpu_kms, irq->irq_idx);

	if (ret) {

		DRM_ERROR("unreg cb fail id=%u, intr=%d, irq=%d ret=%d",

			  DRMID(phys_enc->parent), intr_idx,

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h

+1 −1
Original line number Diff line number Diff line
@@ -165,7 +165,7 @@ struct dpu_encoder_irq { 
	const char *name;

	enum dpu_intr_idx intr_idx;

	int irq_idx;

	struct dpu_irq_callback cb;

	void (*func)(void *arg, int irq_idx);

};



/**

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c

+4 −6
Original line number Diff line number Diff line
@@ -757,30 +757,28 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init( 
	phys_enc->enable_state = DPU_ENC_DISABLED;

	for (i = 0; i < INTR_IDX_MAX; i++) {

		irq = &phys_enc->irq[i];

		INIT_LIST_HEAD(&irq->cb.list);

		irq->irq_idx = -EINVAL;

		irq->cb.arg = phys_enc;

	}



	irq = &phys_enc->irq[INTR_IDX_CTL_START];

	irq->name = "ctl_start";

	irq->intr_idx = INTR_IDX_CTL_START;

	irq->cb.func = dpu_encoder_phys_cmd_ctl_start_irq;

	irq->func = dpu_encoder_phys_cmd_ctl_start_irq;



	irq = &phys_enc->irq[INTR_IDX_PINGPONG];

	irq->name = "pp_done";

	irq->intr_idx = INTR_IDX_PINGPONG;

	irq->cb.func = dpu_encoder_phys_cmd_pp_tx_done_irq;

	irq->func = dpu_encoder_phys_cmd_pp_tx_done_irq;



	irq = &phys_enc->irq[INTR_IDX_RDPTR];

	irq->name = "pp_rd_ptr";

	irq->intr_idx = INTR_IDX_RDPTR;

	irq->cb.func = dpu_encoder_phys_cmd_pp_rd_ptr_irq;

	irq->func = dpu_encoder_phys_cmd_pp_rd_ptr_irq;



	irq = &phys_enc->irq[INTR_IDX_UNDERRUN];

	irq->name = "underrun";

	irq->intr_idx = INTR_IDX_UNDERRUN;

	irq->cb.func = dpu_encoder_phys_cmd_underrun_irq;

	irq->func = dpu_encoder_phys_cmd_underrun_irq;



	atomic_set(&phys_enc->vblank_refcount, 0);

	atomic_set(&phys_enc->pending_kickoff_cnt, 0);

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

+2 −4
Original line number Diff line number Diff line
@@ -711,20 +711,18 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init( 
	phys_enc->enc_spinlock = p->enc_spinlock;

	for (i = 0; i < INTR_IDX_MAX; i++) {

		irq = &phys_enc->irq[i];

		INIT_LIST_HEAD(&irq->cb.list);

		irq->irq_idx = -EINVAL;

		irq->cb.arg = phys_enc;

	}



	irq = &phys_enc->irq[INTR_IDX_VSYNC];

	irq->name = "vsync_irq";

	irq->intr_idx = INTR_IDX_VSYNC;

	irq->cb.func = dpu_encoder_phys_vid_vblank_irq;

	irq->func = dpu_encoder_phys_vid_vblank_irq;



	irq = &phys_enc->irq[INTR_IDX_UNDERRUN];

	irq->name = "underrun";

	irq->intr_idx = INTR_IDX_UNDERRUN;

	irq->cb.func = dpu_encoder_phys_vid_underrun_irq;

	irq->func = dpu_encoder_phys_vid_underrun_irq;



	atomic_set(&phys_enc->vblank_refcount, 0);

	atomic_set(&phys_enc->pending_kickoff_cnt, 0);