Commit c8afaa1b authored by Mateusz Guzik's avatar Mateusz Guzik Committed by Linus Torvalds
Browse files

locking: remove spin_lock_prefetch 

The only remaining consumer is new_inode, where it showed up in 2001 as
commit c37fa164f793 ("v2.4.9.9 -> v2.4.9.10") in a historical repo [1]
with a changelog which does not mention it.

Since then the line got only touched up to keep compiling.

While it may have been of benefit back in the day, it is guaranteed to
at best not get in the way in the multicore setting -- as the code
performs *a lot* of work between the prefetch and actual lock acquire,
any contention means the cacheline is already invalid by the time the
routine calls spin_lock().  It adds spurious traffic, for short.

On top of it prefetch is notoriously tricky to use for single-threaded
purposes, making it questionable from the get go.

As such, remove it.

I admit upfront I did not see value in benchmarking this change, but I
can do it if that is deemed appropriate.

Removal from new_inode and of the entire thing are in the same patch as
requested by Linus, so whatever weird looks can be directed at that guy.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/tglx/history.git/commit/fs/inode.c?id=c37fa164f793735b32aa3f53154ff1a7659e6442

 [1]
Signed-off-by: default avatarMateusz Guzik <mjguzik@gmail.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 3feecb1b

arch/alpha/include/asm/processor.h

+0 −13
Original line number Diff line number Diff line
@@ -47,12 +47,6 @@ unsigned long __get_wchan(struct task_struct *p); 


#define ARCH_HAS_PREFETCH

#define ARCH_HAS_PREFETCHW

#define ARCH_HAS_SPINLOCK_PREFETCH



#ifndef CONFIG_SMP

/* Nothing to prefetch. */

#define spin_lock_prefetch(lock)  	do { } while (0)

#endif



extern inline void prefetch(const void *ptr)  

{
@@ -64,11 +58,4 @@ extern inline void prefetchw(const void *ptr) 
	__builtin_prefetch(ptr, 1, 3);

}



#ifdef CONFIG_SMP

extern inline void spin_lock_prefetch(const void *ptr)  

{

	__builtin_prefetch(ptr, 1, 3);

}

#endif



#endif /* __ASM_ALPHA_PROCESSOR_H */

arch/arm64/include/asm/processor.h

+0 −8
Original line number Diff line number Diff line
@@ -359,14 +359,6 @@ static inline void prefetchw(const void *ptr) 
	asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));

}



#define ARCH_HAS_SPINLOCK_PREFETCH

static inline void spin_lock_prefetch(const void *ptr)

{

	asm volatile(ARM64_LSE_ATOMIC_INSN(

		     "prfm pstl1strm, %a0",

		     "nop") : : "p" (ptr));

}



extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */

extern void __init minsigstksz_setup(void);

arch/ia64/include/asm/processor.h

+0 −3
Original line number Diff line number Diff line
@@ -634,7 +634,6 @@ ia64_imva (void *addr) 


#define ARCH_HAS_PREFETCH

#define ARCH_HAS_PREFETCHW

#define ARCH_HAS_SPINLOCK_PREFETCH

#define PREFETCH_STRIDE			L1_CACHE_BYTES



static inline void
@@ -649,8 +648,6 @@ prefetchw (const void *x) 
	ia64_lfetch_excl(ia64_lfhint_none, x);

}



#define spin_lock_prefetch(x)	prefetchw(x)



extern unsigned long boot_option_idle_override;



enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_FORCE_MWAIT,

arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h

+0 −2
Original line number Diff line number Diff line
@@ -58,8 +58,6 @@ 


#define cpu_has_rixi		(cpu_data[0].cputype != CPU_CAVIUM_OCTEON)



#define ARCH_HAS_SPINLOCK_PREFETCH 1

#define spin_lock_prefetch(x) prefetch(x)

#define PREFETCH_STRIDE 128



#ifdef __OCTEON__

arch/powerpc/include/asm/processor.h

+0 −3
Original line number Diff line number Diff line
@@ -393,7 +393,6 @@ int validate_sp_size(unsigned long sp, struct task_struct *p, 
 */

#define ARCH_HAS_PREFETCH

#define ARCH_HAS_PREFETCHW

#define ARCH_HAS_SPINLOCK_PREFETCH



static inline void prefetch(const void *x)

{
@@ -411,8 +410,6 @@ static inline void prefetchw(const void *x) 
	__asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));

}



#define spin_lock_prefetch(x)	prefetchw(x)



/* asm stubs */

extern unsigned long isa300_idle_stop_noloss(unsigned long psscr_val);

extern unsigned long isa300_idle_stop_mayloss(unsigned long psscr_val);