Commit c8747c54 authored Jul 06, 2022 by Tony Luck Committed by Yongqiang Liu Jul 06, 2022

x86/cpu: Add Lakefield, Alder Lake and Rocket Lake models to the to Intel CPU family

stable inclusion
from stable-v4.19.248
commit 16fcc741a9f50a7b23a6469208f80321d41775f0
category: bugfix
bugzilla: https://gitee.com/src-openeuler/kernel/issues/I5D5RS


CVE: CVE-2022-21123,CVE-2022-21125,CVE-2022-21166

--------------------------------

commit e00b62f0 upstream.

Add three new Intel CPU models.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20200721043749.31567-1-tony.luck@intel.com


Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@canonical.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Yipeng Zou <zouyipeng@huawei.com>
Reviewed-by: Zhang Jianhua <chris.zjh@huawei.com>
Reviewed-by: Liao Chang <liaochang1@huawei.com>
Signed-off-by: Yongqiang Liu <liuyongqiang13@huawei.com>

parent 6a417bc2

arch/x86/include/asm/intel-family.h

+7 −0

Original line number	Diff line number	Diff line
		@@ -64,6 +64,13 @@
		#define INTEL_FAM6_COMETLAKE 0xA5
		#define INTEL_FAM6_COMETLAKE_L 0xA6

		#define INTEL_FAM6_ROCKETLAKE 0xA7

		/* Hybrid Core/Atom Processors */

		#define INTEL_FAM6_LAKEFIELD 0x8A
		#define INTEL_FAM6_ALDERLAKE 0x97

		/* "Small Core" Processors (Atom) */

		#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */