Merge branches 'fixes-for-linus', 'generic', 'cavium', 'module.h-fixes',...

Lantiq SoC External Bus memory mapped GPIO controller

By attaching hardware latches to the EBU it is possible to create output

only gpios. This driver configures a special memory address, which when

written to outputs 16 bit to the latches.

The node describing the memory mapped GPIOs needs to be a child of the node

describing the "lantiq,localbus".

Required properties:

- compatible : Should be "lantiq,gpio-mm-lantiq"

- reg : Address and length of the register set for the device

- #gpio-cells : Should be two.  The first cell is the pin number and

  the second cell is used to specify optional parameters (currently

  unused).

- gpio-controller : Marks the device node as a gpio controller.

Optional properties:

- lantiq,shadow : The default value that we shall assume as already set on the

  shift register cascade.

Example:

localbus@0 {

	#address-cells = <2>;

	#size-cells = <1>;

	ranges = <0 0 0x0 0x3ffffff /* addrsel0 */

		1 0 0x4000000 0x4000010>; /* addsel1 */

	compatible = "lantiq,localbus", "simple-bus";

	gpio_mm0: gpio@4000000 {

		compatible = "lantiq,gpio-mm";

		reg = <1 0x0 0x10>;

		gpio-controller;

		#gpio-cells = <2>;

		lantiq,shadow = <0x77f>

	};

}

Lantiq SoC Serial To Parallel (STP) GPIO controller

The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a

peripheral controller used to drive external shift register cascades. At most

3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem

to drive the 2 LSBs of the cascade automatically.

Required properties:

- compatible : Should be "lantiq,gpio-stp-xway"

- reg : Address and length of the register set for the device

- #gpio-cells : Should be two.  The first cell is the pin number and

  the second cell is used to specify optional parameters (currently

  unused).

- gpio-controller : Marks the device node as a gpio controller.

Optional properties:

- lantiq,shadow : The default value that we shall assume as already set on the

  shift register cascade.

- lantiq,groups : Set the 3 bit mask to select which of the 3 groups are enabled

  in the shift register cascade.

- lantiq,dsl : The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit

  property can enable this feature.

- lantiq,phy1 : The gphy1 core can control 3 bits of the gpio cascade.

- lantiq,phy2 : The gphy2 core can control 3 bits of the gpio cascade.

- lantiq,rising : use rising instead of falling edge for the shift register

Example:

gpio1: stp@E100BB0 {

	compatible = "lantiq,gpio-stp-xway";

	reg = <0xE100BB0 0x40>;

	#gpio-cells = <2>;

	gpio-controller;

	lantiq,shadow = <0xffff>;

	lantiq,groups = <0x7>;

	lantiq,dsl = <0x3>;

	lantiq,phy1 = <0x7>;

	lantiq,phy2 = <0x7>;

	/* lantiq,rising; */

};

	select ARCH_REQUIRE_GPIOLIB

	select SWAP_IO_SPACE

	select BOOT_RAW

	select HAVE_CLK

	select MIPS_MACHINE

	select HAVE_MACH_CLKDEV

	select CLKDEV_LOOKUP

	select USE_OF

config LASAT

	bool "LASAT Networks platforms"

#include <linux/gpio.h>

#include <linux/i2c.h>

#include <linux/init.h>

#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/io.h>

#include <linux/leds.h>

	  Say 'Y' here if you want your kernel to support the

	  Atheros AP81 reference board.

config ATH79_MACH_DB120

	bool "Atheros DB120 reference board"

	select SOC_AR934X

	select ATH79_DEV_GPIO_BUTTONS

	select ATH79_DEV_LEDS_GPIO

	select ATH79_DEV_SPI

	select ATH79_DEV_USB

	select ATH79_DEV_WMAC

	help

	  Say 'Y' here if you want your kernel to support the

	  Atheros DB120 reference board.

config ATH79_MACH_PB44

	bool "Atheros PB44 reference board"

	select SOC_AR71XX

config SOC_AR71XX

	select USB_ARCH_HAS_EHCI

	select USB_ARCH_HAS_OHCI

	select HW_HAS_PCI

	def_bool n

config SOC_AR724X

	select USB_ARCH_HAS_EHCI

	select USB_ARCH_HAS_OHCI

	select HW_HAS_PCI

	select PCI_AR724X if PCI

	def_bool n

config SOC_AR913X

	select USB_ARCH_HAS_EHCI

	def_bool n

config SOC_AR934X

	select USB_ARCH_HAS_EHCI

	select HW_HAS_PCI

	select PCI_AR724X if PCI

	def_bool n

config PCI_AR724X

	def_bool n

config ATH79_DEV_GPIO_BUTTONS

	def_bool n

	def_bool n

config ATH79_DEV_WMAC

	depends on (SOC_AR913X || SOC_AR933X)

	depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)

	def_bool n

endif