Unverified Commit c77f4455 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!1084 LoongArch: fix wrong 7a1000 int_clear register write 

Merge Pull Request from: @Hongchen_Zhang 
 
7A1000 int_clear register should be write 64bit aligned. 
 
Link:https://gitee.com/openeuler/kernel/pulls/1084

 

Reviewed-by: default avatarGuo Dongtai <guodongtai@kylinos.cn>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parents e1c4614e 3b5bcd2a

drivers/irqchip/irq-loongson-pch-pic.c

+11 −5
Original line number Diff line number Diff line
@@ -33,6 +33,10 @@ 
#define PIC_COUNT		(PIC_COUNT_PER_REG * PIC_REG_COUNT)

#define PIC_REG_IDX(irq_id)	((irq_id) / PIC_COUNT_PER_REG)

#define PIC_REG_BIT(irq_id)	((irq_id) % PIC_COUNT_PER_REG)

#define PIC_COUNT_PER_REG64	64

#define PIC_REG64_COUNT		1

#define PIC_REG64_IDX(irq_id)	((irq_id) / PIC_COUNT_PER_REG64)

#define PIC_REG64_BIT(irq_id)	((irq_id) % PIC_COUNT_PER_REG64)



static int nr_pics;
@@ -88,8 +92,8 @@ static void pch_pic_unmask_irq(struct irq_data *d) 
{

	struct pch_pic *priv = irq_data_get_irq_chip_data(d);



	writel(BIT(PIC_REG_BIT(d->hwirq)),

			priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4);

	writeq(BIT(PIC_REG64_BIT(d->hwirq)),

			priv->base + PCH_PIC_CLR + PIC_REG64_IDX(d->hwirq) * 8);



	irq_chip_unmask_parent(d);

	pch_pic_bitclr(priv, PCH_PIC_MASK, d->hwirq);
@@ -136,8 +140,8 @@ static void pch_pic_ack_irq(struct irq_data *d) 


	reg = readl(priv->base + PCH_PIC_EDGE + PIC_REG_IDX(d->hwirq) * 4);

	if (reg & BIT(PIC_REG_BIT(d->hwirq))) {

		writel(BIT(PIC_REG_BIT(d->hwirq)),

			priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4);

		writeq(BIT(PIC_REG64_BIT(d->hwirq)),

			priv->base + PCH_PIC_CLR + PIC_REG64_IDX(d->hwirq) * 8);

	}

	irq_chip_ack_parent(d);

}
@@ -224,13 +228,15 @@ static void pch_pic_reset(struct pch_pic *priv) 
	for (i = 0; i < PIC_REG_COUNT; i++) {

		/* Clear IRQ cause registers, mask all interrupts */

		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_MASK + 4 * i);

		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_CLR + 4 * i);

		/* Clear auto bounce, we don't need that */

		writel_relaxed(0, priv->base + PCH_PIC_AUTO0 + 4 * i);

		writel_relaxed(0, priv->base + PCH_PIC_AUTO1 + 4 * i);

		/* Enable HTMSI transformer */

		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_HTMSI_EN + 4 * i);

	}



	for (i = 0; i < PIC_REG64_COUNT; i++)

		writeq_relaxed((u64)-1, priv->base + PCH_PIC_CLR + 8 * i);

}



static int pch_pic_suspend(void)