Commit c777dc9e authored by Christian König's avatar Christian König
Browse files

drm/ttm: move the page_alignment into the BO v2 



The alignment is a constant property and shouldn't change.

v2: move documentation as well as suggested by Matthew.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210413135248.1266-4-christian.koenig@amd.com
parent 65747ded

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -763,7 +763,7 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, 
		void __user *out = u64_to_user_ptr(args->value);



		info.bo_size = robj->tbo.base.size;

		info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;

		info.alignment = robj->tbo.page_alignment << PAGE_SHIFT;

		info.domains = robj->preferred_domains;

		info.domain_flags = robj->flags;

		amdgpu_bo_unreserve(robj);

drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c

+1 −1
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ static int amdgpu_gtt_mgr_new(struct ttm_resource_manager *man, 


	spin_lock(&mgr->lock);

	r = drm_mm_insert_node_in_range(&mgr->mm, &node->node, mem->num_pages,

					mem->page_alignment, 0, place->fpfn,

					tbo->page_alignment, 0, place->fpfn,

					place->lpfn, DRM_MM_INSERT_BEST);

	spin_unlock(&mgr->lock);

drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

+1 −1
Original line number Diff line number Diff line
@@ -184,7 +184,7 @@ static inline unsigned amdgpu_bo_ngpu_pages(struct amdgpu_bo *bo) 


static inline unsigned amdgpu_bo_gpu_page_alignment(struct amdgpu_bo *bo)

{

	return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;

	return (bo->tbo.page_alignment << PAGE_SHIFT) / AMDGPU_GPU_PAGE_SIZE;

}



/**

drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

+3 −2
Original line number Diff line number Diff line
@@ -451,7 +451,8 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 
		/* default to 2MB */

		pages_per_node = (2UL << (20UL - PAGE_SHIFT));

#endif

		pages_per_node = max((uint32_t)pages_per_node, mem->page_alignment);

		pages_per_node = max((uint32_t)pages_per_node,

				     tbo->page_alignment);

		num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node);

	}
@@ -490,7 +491,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, 


	for (; pages_left; ++i) {

		unsigned long pages = min(pages_left, pages_per_node);

		uint32_t alignment = mem->page_alignment;

		uint32_t alignment = tbo->page_alignment;



		if (pages == pages_per_node)

			alignment = pages_per_node;

drivers/gpu/drm/radeon/radeon_object.h

+1 −1
Original line number Diff line number Diff line
@@ -119,7 +119,7 @@ static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo) 


static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)

{

	return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;

	return (bo->tbo.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;

}



/**