Unverified Commit c732b756 authored by Mark Brown's avatar Mark Brown
Browse files

Merge series "spi: atmel-quadspi: Fix AHB memory accesses" from Tudor Ambarus... 

Merge series "spi: atmel-quadspi: Fix AHB memory accesses" from Tudor Ambarus <tudor.ambarus@microchip.com>:

Starting with the move of the atmel-quadspi driver under SPI,
the following error could be seen when mounting a 16MByte ubifs:
UBIFS error (ubi0:0 pid 1893): check_lpt_type.constprop.6: invalid type (15) in LPT node type

1/4 fixes AHB accesses. The rest of the patches are small optimizations.
Tested on both sama5d2 and sam9x60.

Tudor Ambarus (4):
  spi: atmel-quadspi: Fix AHB memory accesses
  spi: atmel-quadspi: Drop superfluous set of QSPI_IFR_APBTFRTYP_READ
  spi: atmel-quadspi: Write QSPI_IAR only when needed
  spi: atmel-quadspi: Move common code outside of if else

 drivers/spi/atmel-quadspi.c | 25 +++++++++++++------------
 1 file changed, 13 insertions(+), 12 deletions(-)

--
2.25.1

base-commit: 3650b228

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parents c7b88456 c066efb0

drivers/spi/atmel-quadspi.c

+13 −12
Original line number Diff line number Diff line
@@ -365,10 +365,14 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq, 
	if (dummy_cycles)

		ifr |= QSPI_IFR_NBDUM(dummy_cycles);



	/* Set data enable */

	if (op->data.nbytes)

	/* Set data enable and data transfer type. */

	if (op->data.nbytes) {

		ifr |= QSPI_IFR_DATAEN;



		if (op->addr.nbytes)

			ifr |= QSPI_IFR_TFRTYP_MEM;

	}



	/*

	 * If the QSPI controller is set in regular SPI mode, set it in

	 * Serial Memory Mode (SMM).
@@ -381,27 +385,24 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq, 
	/* Clear pending interrupts */

	(void)atmel_qspi_read(aq, QSPI_SR);



	if (aq->caps->has_ricr) {

		if (!op->addr.nbytes && op->data.dir == SPI_MEM_DATA_IN)

			ifr |= QSPI_IFR_APBTFRTYP_READ;



		/* Set QSPI Instruction Frame registers */

	/* Set QSPI Instruction Frame registers. */

	if (op->addr.nbytes && !op->data.nbytes)

		atmel_qspi_write(iar, aq, QSPI_IAR);



	if (aq->caps->has_ricr) {

		if (op->data.dir == SPI_MEM_DATA_IN)

			atmel_qspi_write(icr, aq, QSPI_RICR);

		else

			atmel_qspi_write(icr, aq, QSPI_WICR);

		atmel_qspi_write(ifr, aq, QSPI_IFR);

	} else {

		if (op->data.dir == SPI_MEM_DATA_OUT)

		if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT)

			ifr |= QSPI_IFR_SAMA5D2_WRITE_TRSFR;



		/* Set QSPI Instruction Frame registers */

		atmel_qspi_write(iar, aq, QSPI_IAR);

		atmel_qspi_write(icr, aq, QSPI_ICR);

		atmel_qspi_write(ifr, aq, QSPI_IFR);

	}



	atmel_qspi_write(ifr, aq, QSPI_IFR);



	return 0;

}