Commit c715eb9f authored by Luwei Kang's avatar Luwei Kang Committed by Paolo Bonzini
Browse files

KVM: x86: Add support of clear Trace_ToPA_PMI status 



Let guests clear the Intel PT ToPA PMI status (bit 55 of
MSR_CORE_PERF_GLOBAL_OVF_CTRL).

Signed-off-by: default avatarLuwei Kang <luwei.kang@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 8479e04e

arch/x86/include/asm/kvm_host.h

+1 −0
Original line number Diff line number Diff line
@@ -469,6 +469,7 @@ struct kvm_pmu { 
	u64 global_ovf_ctrl;

	u64 counter_bitmask[2];

	u64 global_ctrl_mask;

	u64 global_ovf_ctrl_mask;

	u64 reserved_bits;

	u8 version;

	struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];

arch/x86/include/asm/msr-index.h

+4 −0
Original line number Diff line number Diff line
@@ -784,6 +784,10 @@ 
/* PERF_GLOBAL_OVF_CTL bits */

#define MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT	55

#define MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI		(1ULL << MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT)

#define MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF_BIT		62

#define MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF			(1ULL <<  MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF_BIT)

#define MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD_BIT		63

#define MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD			(1ULL << MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD_BIT)



/* Geode defined MSRs */

#define MSR_GEODE_BUSCONT_CONF0		0x00001900

arch/x86/kvm/vmx/pmu_intel.c

+7 −1
Original line number Diff line number Diff line
@@ -227,7 +227,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) 
		}

		break;

	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:

		if (!(data & (pmu->global_ctrl_mask & ~(3ull<<62)))) {

		if (!(data & pmu->global_ovf_ctrl_mask)) {

			if (!msr_info->host_initiated)

				pmu->global_status &= ~data;

			pmu->global_ovf_ctrl = data;
@@ -297,6 +297,12 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) 
	pmu->global_ctrl = ((1ull << pmu->nr_arch_gp_counters) - 1) |

		(((1ull << pmu->nr_arch_fixed_counters) - 1) << INTEL_PMC_IDX_FIXED);

	pmu->global_ctrl_mask = ~pmu->global_ctrl;

	pmu->global_ovf_ctrl_mask = pmu->global_ctrl_mask

			& ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |

			    MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);

	if (kvm_x86_ops->pt_supported())

		pmu->global_ovf_ctrl_mask &=

				~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI;



	entry = kvm_find_cpuid_entry(vcpu, 7, 0);

	if (entry &&