Commit c6dddf45 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: replace readq/writeq with atomic64 operations 



what we really want is a read or write that is guaranteed to be 64 bits
at a time, atomic64 operations are supported on all architectures

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 2a1e00c3

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+2 −6
Original line number Diff line number Diff line
@@ -273,14 +273,10 @@ void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, 
 */

uint64_t amdgpu_mm_rreg64(struct amdgpu_device *adev, uint32_t reg)

{

	uint64_t ret;



	if ((reg * 4) < adev->rmmio_size)

		ret = readq(((void __iomem *)adev->rmmio) + (reg * 4));

		return atomic64_read((atomic64_t *)(adev->rmmio + (reg * 4)));

	else

		BUG();



	return ret;

}



/**
@@ -295,7 +291,7 @@ uint64_t amdgpu_mm_rreg64(struct amdgpu_device *adev, uint32_t reg) 
void amdgpu_mm_wreg64(struct amdgpu_device *adev, uint32_t reg, uint64_t v)

{

	if ((reg * 4) < adev->rmmio_size)

		writeq(v, ((void __iomem *)adev->rmmio) + (reg * 4));

		atomic64_set((atomic64_t *)(adev->rmmio + (reg * 4)), v);

	else

		BUG();

}