drm/amd/display: Add some extra kernel doc to amdgpu_dm (c620e79b) · Commits · EulixOS / Software / Kernel

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+13 −3

Original line number	Diff line number	Diff line
		@@ -9321,6 +9321,7 @@ static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm

		/**
		* amdgpu_dm_atomic_check() - Atomic check implementation for AMDgpu DM.
		*
		* @dev: The DRM device
		* @state: The atomic state to commit
		*
		@@ -9935,6 +9936,16 @@ static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector,
		return valid_vsdb_found ? i : -ENODEV;
		}

		/**
		* amdgpu_dm_update_freesync_caps - Update Freesync capabilities
		*
		* @aconnector: Connector to query.
		*
		* Amdgpu supports Freesync in DP and HDMI displays, and it is required to keep
		* track of some of the display information in the internal data struct used by
		* amdgpu_dm. This function checks which type of connector we need to set the
		* FreeSync parameters.
		*/
		void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
		struct edid *edid)
		{
		@@ -9949,8 +9960,8 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,

		struct drm_device *dev = connector->dev;
		struct amdgpu_device *adev = drm_to_adev(dev);
		bool freesync_capable = false;
		struct amdgpu_hdmi_vsdb_info vsdb_info = {0};
		bool freesync_capable = false;

		if (!connector->state) {
		DRM_ERROR("%s - Connector has no state", __func__);
		@@ -9979,7 +9990,6 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
		if (!adev->dm.freesync_module)
		goto update;


		if (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT
		\|\| sink->sink_signal == SIGNAL_TYPE_EDP) {
		bool edid_check_required = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

+41 −5

Original line number	Diff line number	Diff line
		@@ -598,6 +598,10 @@ struct amdgpu_dm_connector {
		* The 'current' sink is in dc_link->sink. */
		struct dc_sink *dc_sink;
		struct dc_link *dc_link;

		/**
		* @dc_em_sink: Reference to the emulated (virtual) sink.
		*/
		struct dc_sink *dc_em_sink;

		/* DM only */
		@@ -610,7 +614,16 @@ struct amdgpu_dm_connector {
		struct amdgpu_i2c_adapter *i2c;

		/* Monitor range limits */
		/**
		* @min_vfreq: Minimal frequency supported by the display in Hz. This
		* value is set to zero when there is no FreeSync support.
		*/
		int min_vfreq;

		/**
		* @max_vfreq: Maximum frequency supported by the display in Hz. This
		* value is set to zero when there is no FreeSync support.
		*/
		int max_vfreq ;
		int pixel_clock_mhz;

		@@ -705,11 +718,34 @@ struct dm_connector_state {
		uint64_t pbn;
		};

		/**
		* struct amdgpu_hdmi_vsdb_info - Keep track of the VSDB info
		*
		* AMDGPU supports FreeSync over HDMI by using the VSDB section, and this
		* struct is useful to keep track of the display-specific information about
		* FreeSync.
		*/
		struct amdgpu_hdmi_vsdb_info {
		unsigned int amd_vsdb_version; /* VSDB version, should be used to determine which VSIF to send */
		bool freesync_supported; /* FreeSync Supported */
		unsigned int min_refresh_rate_hz; /* FreeSync Minimum Refresh Rate in Hz */
		unsigned int max_refresh_rate_hz; /* FreeSync Maximum Refresh Rate in Hz */
		/**
		* @amd_vsdb_version: Vendor Specific Data Block Version, should be
		* used to determine which Vendor Specific InfoFrame (VSIF) to send.
		*/
		unsigned int amd_vsdb_version;

		/**
		* @freesync_supported: FreeSync Supported.
		*/
		bool freesync_supported;

		/**
		* @min_refresh_rate_hz: FreeSync Minimum Refresh Rate in Hz.
		*/
		unsigned int min_refresh_rate_hz;

		/**
		* @max_refresh_rate_hz: FreeSync Maximum Refresh Rate in Hz
		*/
		unsigned int max_refresh_rate_hz;
		};