Commit c60877ff authored by Damian Muszynski's avatar Damian Muszynski Committed by Aichun Shi
Browse files

crypto: qat - fix ring to service map for dcc in 420xx 

mainline inclusion
from mainline-v6.9-rc1
commit a20a6060e0dd57fecaf55487985aef28bd08c6bf
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I9A5BW
CVE: N/A
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a20a6060e0dd57fecaf55487985aef28bd08c6bf



-------------------------------------

If a device is configured for data compression chaining (dcc), half of the
engines are loaded with the symmetric crypto image and the rest are loaded
with the compression image.
However, in such configuration all rings can handle compression requests.

Fix the ring to service mapping so that when a device is configured for
dcc, the ring to service mapping reports that all rings in a bank can
be used for compression.

Intel-SIG: commit a20a6060e0dd crypto: qat - fix ring to service map for dcc in 420xx
Backport to support QAT in-tree driver

Fixes: fcf60f4bcf54 ("crypto: qat - add support for 420xx devices")
Signed-off-by: default avatarDamian Muszynski <damian.muszynski@intel.com>
Reviewed-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
[ Aichun Shi: amend commit log ]
Signed-off-by: default avatarAichun Shi <aichun.shi@intel.com>
parent a61d326e

drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c

+8 −0
Original line number Diff line number Diff line
@@ -372,6 +372,13 @@ static u16 get_ring_to_svc_map(struct adf_accel_dev *accel_dev) 
	if (!fw_config)

		return 0;



	/* If dcc, all rings handle compression requests */

	if (adf_get_service_enabled(accel_dev) == SVC_DCC) {

		for (i = 0; i < RP_GROUP_COUNT; i++)

			rps[i] = COMP;

		goto set_mask;

	}



	for (i = 0; i < RP_GROUP_COUNT; i++) {

		switch (fw_config[i].ae_mask) {

		case ADF_AE_GROUP_0:
@@ -400,6 +407,7 @@ static u16 get_ring_to_svc_map(struct adf_accel_dev *accel_dev) 
		}

	}



set_mask:

	ring_to_svc_map = rps[RP_GROUP_0] << ADF_CFG_SERV_RING_PAIR_0_SHIFT |

			  rps[RP_GROUP_1] << ADF_CFG_SERV_RING_PAIR_1_SHIFT |

			  rps[RP_GROUP_0] << ADF_CFG_SERV_RING_PAIR_2_SHIFT |