Commit c58ff3ed authored by Daniel Machon's avatar Daniel Machon Committed by Paolo Abeni
Browse files

net: microchip: sparx5: add support for offloading default prio 



Add support for offloading default prio {ETHERTYPE, 0, prio}.

Signed-off-by: default avatarDaniel Machon <daniel.machon@microchip.com>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 8dcf69a6

drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c

+12 −0
Original line number Diff line number Diff line
@@ -49,6 +49,13 @@ static int sparx5_dcb_app_validate(struct net_device *dev, 
	int err = 0;



	switch (app->selector) {

	/* Default priority checks */

	case IEEE_8021QAZ_APP_SEL_ETHERTYPE:

		if (app->protocol != 0)

			err = -EINVAL;

		else if (app->priority >= SPX5_PRIOS)

			err = -ERANGE;

		break;

	/* Dscp checks */

	case IEEE_8021QAZ_APP_SEL_DSCP:

		if (app->protocol >= SPARX5_PORT_QOS_DSCP_COUNT)
@@ -137,6 +144,11 @@ static int sparx5_dcb_app_update(struct net_device *dev) 
	dscp_map = &qos.dscp.map;

	pcp_map = &qos.pcp.map;



	/* Get default prio. */

	qos.default_prio = dcb_ieee_getapp_default_prio_mask(dev);

	if (qos.default_prio)

		qos.default_prio = fls(qos.default_prio) - 1;



	/* Get dscp ingress mapping */

	for (i = 0; i < ARRAY_SIZE(dscp_map->map); i++) {

		app_itr.selector = IEEE_8021QAZ_APP_SEL_DSCP;

drivers/net/ethernet/microchip/sparx5/sparx5_port.c

+23 −0
Original line number Diff line number Diff line
@@ -1151,6 +1151,7 @@ int sparx5_port_qos_set(struct sparx5_port *port, 
{

	sparx5_port_qos_dscp_set(port, &qos->dscp);

	sparx5_port_qos_pcp_set(port, &qos->pcp);

	sparx5_port_qos_default_set(port, qos);



	return 0;

}
@@ -1220,3 +1221,25 @@ int sparx5_port_qos_dscp_set(const struct sparx5_port *port, 


	return 0;

}



int sparx5_port_qos_default_set(const struct sparx5_port *port,

				const struct sparx5_port_qos *qos)

{

	struct sparx5 *sparx5 = port->sparx5;



	/* Set default prio and dp level */

	spx5_rmw(ANA_CL_QOS_CFG_DEFAULT_QOS_VAL_SET(qos->default_prio) |

		 ANA_CL_QOS_CFG_DEFAULT_DP_VAL_SET(0),

		 ANA_CL_QOS_CFG_DEFAULT_QOS_VAL |

		 ANA_CL_QOS_CFG_DEFAULT_DP_VAL,

		 sparx5, ANA_CL_QOS_CFG(port->portno));



	/* Set default pcp and dei for untagged frames */

	spx5_rmw(ANA_CL_VLAN_CTRL_PORT_PCP_SET(0) |

		 ANA_CL_VLAN_CTRL_PORT_DEI_SET(0),

		 ANA_CL_VLAN_CTRL_PORT_PCP |

		 ANA_CL_VLAN_CTRL_PORT_DEI,

		 sparx5, ANA_CL_VLAN_CTRL(port->portno));



	return 0;

}

drivers/net/ethernet/microchip/sparx5/sparx5_port.h

+5 −0
Original line number Diff line number Diff line
@@ -119,6 +119,7 @@ struct sparx5_port_qos_dscp { 
struct sparx5_port_qos {

	struct sparx5_port_qos_pcp pcp;

	struct sparx5_port_qos_dscp dscp;

	u8 default_prio;

};



int sparx5_port_qos_set(struct sparx5_port *port, struct sparx5_port_qos *qos);
@@ -128,4 +129,8 @@ int sparx5_port_qos_pcp_set(const struct sparx5_port *port, 


int sparx5_port_qos_dscp_set(const struct sparx5_port *port,

			     struct sparx5_port_qos_dscp *qos);



int sparx5_port_qos_default_set(const struct sparx5_port *port,

				const struct sparx5_port_qos *qos);



#endif	/* __SPARX5_PORT_H__ */