Commit c545b9f0 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/inst: Define ppc_inst_t 



In order to stop using 'struct ppc_inst' on PPC32,
define a ppc_inst_t typedef.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/fe5baa2c66fea9db05a8b300b3e8d2880a42596c.1638208156.git.christophe.leroy@csgroup.eu
parent 3261d99a

arch/powerpc/include/asm/code-patching.h

+9 −9
Original line number Diff line number Diff line
@@ -24,20 +24,20 @@ 


bool is_offset_in_branch_range(long offset);

bool is_offset_in_cond_branch_range(long offset);

int create_branch(struct ppc_inst *instr, const u32 *addr,

int create_branch(ppc_inst_t *instr, const u32 *addr,

		  unsigned long target, int flags);

int create_cond_branch(struct ppc_inst *instr, const u32 *addr,

int create_cond_branch(ppc_inst_t *instr, const u32 *addr,

		       unsigned long target, int flags);

int patch_branch(u32 *addr, unsigned long target, int flags);

int patch_instruction(u32 *addr, struct ppc_inst instr);

int raw_patch_instruction(u32 *addr, struct ppc_inst instr);

int patch_instruction(u32 *addr, ppc_inst_t instr);

int raw_patch_instruction(u32 *addr, ppc_inst_t instr);



static inline unsigned long patch_site_addr(s32 *site)

{

	return (unsigned long)site + *site;

}



static inline int patch_instruction_site(s32 *site, struct ppc_inst instr)

static inline int patch_instruction_site(s32 *site, ppc_inst_t instr)

{

	return patch_instruction((u32 *)patch_site_addr(site), instr);

}
@@ -58,11 +58,11 @@ static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned 
	return modify_instruction((unsigned int *)patch_site_addr(site), clr, set);

}



int instr_is_relative_branch(struct ppc_inst instr);

int instr_is_relative_link_branch(struct ppc_inst instr);

int instr_is_relative_branch(ppc_inst_t instr);

int instr_is_relative_link_branch(ppc_inst_t instr);

unsigned long branch_target(const u32 *instr);

int translate_branch(struct ppc_inst *instr, const u32 *dest, const u32 *src);

extern bool is_conditional_branch(struct ppc_inst instr);

int translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src);

bool is_conditional_branch(ppc_inst_t instr);

#ifdef CONFIG_PPC_BOOK3E_64

void __patch_exception(int exc, unsigned long addr);

#define patch_exception(exc, name) do { \

arch/powerpc/include/asm/hw_breakpoint.h

+2 −2
Original line number Diff line number Diff line
@@ -56,11 +56,11 @@ static inline int nr_wp_slots(void) 
	return cpu_has_feature(CPU_FTR_DAWR1) ? 2 : 1;

}



bool wp_check_constraints(struct pt_regs *regs, struct ppc_inst instr,

bool wp_check_constraints(struct pt_regs *regs, ppc_inst_t instr,

			  unsigned long ea, int type, int size,

			  struct arch_hw_breakpoint *info);



void wp_get_instr_detail(struct pt_regs *regs, struct ppc_inst *instr,

void wp_get_instr_detail(struct pt_regs *regs, ppc_inst_t *instr,

			 int *type, int *size, unsigned long *ea);



#ifdef CONFIG_HAVE_HW_BREAKPOINT

arch/powerpc/include/asm/inst.h

+18 −18
Original line number Diff line number Diff line
@@ -8,7 +8,7 @@ 
({									\

	long __gui_ret;							\

	u32 __user *__gui_ptr = (u32 __user *)ptr;			\

	struct ppc_inst __gui_inst;					\

	ppc_inst_t __gui_inst;						\

	unsigned int __prefix, __suffix;				\

									\

	__chk_user_ptr(ptr);						\
@@ -34,29 +34,29 @@ 
 * Instruction data type for POWER

 */



struct ppc_inst {

typedef struct {

	u32 val;

#ifdef CONFIG_PPC64

	u32 suffix;

#endif

} __packed;

} __packed ppc_inst_t;



static inline u32 ppc_inst_val(struct ppc_inst x)

static inline u32 ppc_inst_val(ppc_inst_t x)

{

	return x.val;

}



static inline int ppc_inst_primary_opcode(struct ppc_inst x)

static inline int ppc_inst_primary_opcode(ppc_inst_t x)

{

	return ppc_inst_val(x) >> 26;

}



#define ppc_inst(x) ((struct ppc_inst){ .val = (x) })

#define ppc_inst(x) ((ppc_inst_t){ .val = (x) })



#ifdef CONFIG_PPC64

#define ppc_inst_prefix(x, y) ((struct ppc_inst){ .val = (x), .suffix = (y) })

#define ppc_inst_prefix(x, y) ((ppc_inst_t){ .val = (x), .suffix = (y) })



static inline u32 ppc_inst_suffix(struct ppc_inst x)

static inline u32 ppc_inst_suffix(ppc_inst_t x)

{

	return x.suffix;

}
@@ -64,14 +64,14 @@ static inline u32 ppc_inst_suffix(struct ppc_inst x) 
#else

#define ppc_inst_prefix(x, y) ((void)y, ppc_inst(x))



static inline u32 ppc_inst_suffix(struct ppc_inst x)

static inline u32 ppc_inst_suffix(ppc_inst_t x)

{

	return 0;

}



#endif /* CONFIG_PPC64 */



static inline struct ppc_inst ppc_inst_read(const u32 *ptr)

static inline ppc_inst_t ppc_inst_read(const u32 *ptr)

{

	if (IS_ENABLED(CONFIG_PPC64) && (*ptr >> 26) == OP_PREFIX)

		return ppc_inst_prefix(*ptr, *(ptr + 1));
@@ -79,17 +79,17 @@ static inline struct ppc_inst ppc_inst_read(const u32 *ptr) 
		return ppc_inst(*ptr);

}



static inline bool ppc_inst_prefixed(struct ppc_inst x)

static inline bool ppc_inst_prefixed(ppc_inst_t x)

{

	return IS_ENABLED(CONFIG_PPC64) && ppc_inst_primary_opcode(x) == OP_PREFIX;

}



static inline struct ppc_inst ppc_inst_swab(struct ppc_inst x)

static inline ppc_inst_t ppc_inst_swab(ppc_inst_t x)

{

	return ppc_inst_prefix(swab32(ppc_inst_val(x)), swab32(ppc_inst_suffix(x)));

}



static inline bool ppc_inst_equal(struct ppc_inst x, struct ppc_inst y)

static inline bool ppc_inst_equal(ppc_inst_t x, ppc_inst_t y)

{

	if (ppc_inst_val(x) != ppc_inst_val(y))

		return false;
@@ -98,7 +98,7 @@ static inline bool ppc_inst_equal(struct ppc_inst x, struct ppc_inst y) 
	return ppc_inst_suffix(x) == ppc_inst_suffix(y);

}



static inline int ppc_inst_len(struct ppc_inst x)

static inline int ppc_inst_len(ppc_inst_t x)

{

	return ppc_inst_prefixed(x) ? 8 : 4;

}
@@ -109,14 +109,14 @@ static inline int ppc_inst_len(struct ppc_inst x) 
 */

static inline u32 *ppc_inst_next(u32 *location, u32 *value)

{

	struct ppc_inst tmp;

	ppc_inst_t tmp;



	tmp = ppc_inst_read(value);



	return (void *)location + ppc_inst_len(tmp);

}



static inline unsigned long ppc_inst_as_ulong(struct ppc_inst x)

static inline unsigned long ppc_inst_as_ulong(ppc_inst_t x)

{

	if (IS_ENABLED(CONFIG_PPC32))

		return ppc_inst_val(x);
@@ -128,7 +128,7 @@ static inline unsigned long ppc_inst_as_ulong(struct ppc_inst x) 


#define PPC_INST_STR_LEN sizeof("00000000 00000000")



static inline char *__ppc_inst_as_str(char str[PPC_INST_STR_LEN], struct ppc_inst x)

static inline char *__ppc_inst_as_str(char str[PPC_INST_STR_LEN], ppc_inst_t x)

{

	if (ppc_inst_prefixed(x))

		sprintf(str, "%08x %08x", ppc_inst_val(x), ppc_inst_suffix(x));
@@ -145,6 +145,6 @@ static inline char *__ppc_inst_as_str(char str[PPC_INST_STR_LEN], struct ppc_ins 
	__str;				\

})



int copy_inst_from_kernel_nofault(struct ppc_inst *inst, u32 *src);

int copy_inst_from_kernel_nofault(ppc_inst_t *inst, u32 *src);



#endif /* _ASM_POWERPC_INST_H */

arch/powerpc/include/asm/sstep.h

+2 −2
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@ union vsx_reg { 
 * otherwise.

 */

extern int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,

			 struct ppc_inst instr);

			 ppc_inst_t instr);



/*

 * Emulate an instruction that can be executed just by updating
@@ -162,7 +162,7 @@ void emulate_update_regs(struct pt_regs *reg, struct instruction_op *op); 
 * 0 if it could not be emulated, or -1 for an instruction that

 * should not be emulated (rfid, mtmsrd clearing MSR_RI, etc.).

 */

extern int emulate_step(struct pt_regs *regs, struct ppc_inst instr);

int emulate_step(struct pt_regs *regs, ppc_inst_t instr);



/*

 * Emulate a load or store instruction by reading/writing the

arch/powerpc/kernel/align.c

+2 −2
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ static struct aligninfo spe_aligninfo[32] = { 
 * so we don't need the address swizzling.

 */

static int emulate_spe(struct pt_regs *regs, unsigned int reg,

		       struct ppc_inst ppc_instr)

		       ppc_inst_t ppc_instr)

{

	union {

		u64 ll;
@@ -300,7 +300,7 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg, 


int fix_alignment(struct pt_regs *regs)

{

	struct ppc_inst instr;

	ppc_inst_t instr;

	struct instruction_op op;

	int r, type;