Commit c52cf141 authored by Chao Gao's avatar Chao Gao Committed by Jason Zeng
Browse files

KVM: VMX: enable IPI virtualization 

mainline inclusion
from mainline-v6.0-rc1
commit d588bb9b
category: feature
feature: IPI Virtualization
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I5ODSC
CVE: N/A
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d588bb9be1da6aa750aa64875fe57369db983d8b



Intel-SIG: commit d588bb9b ("KVM: VMX: enable IPI virtualization")

-------------------------------------

KVM: VMX: enable IPI virtualization

With IPI virtualization enabled, the processor emulates writes to
APIC registers that would send IPIs. The processor sets the bit
corresponding to the vector in target vCPU's PIR and may send a
notification (IPI) specified by NDST and NV fields in target vCPU's
Posted-Interrupt Descriptor (PID). It is similar to what IOMMU
engine does when dealing with posted interrupt from devices.

A PID-pointer table is used by the processor to locate the PID of a
vCPU with the vCPU's APIC ID. The table size depends on maximum APIC
ID assigned for current VM session from userspace. Allocating memory
for PID-pointer table is deferred to vCPU creation, because irqchip
mode and VM-scope maximum APIC ID is settled at that point. KVM can
skip PID-pointer table allocation if !irqchip_in_kernel().

Like VT-d PI, if a vCPU goes to blocked state, VMM needs to switch its
notification vector to wakeup vector. This can ensure that when an IPI
for blocked vCPUs arrives, VMM can get control and wake up blocked
vCPUs. And if a VCPU is preempted, its posted interrupt notification
is suppressed.

Note that IPI virtualization can only virualize physical-addressing,
flat mode, unicast IPIs. Sending other IPIs would still cause a
trap-like APIC-write VM-exit and need to be handled by VMM.

Signed-off-by: default avatarChao Gao <chao.gao@intel.com>
Signed-off-by: default avatarZeng Guang <guang.zeng@intel.com>
Message-Id: <20220419154510.11938-1-guang.zeng@intel.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarJason Zeng <jason.zeng@intel.com>
parent 254957fa

arch/x86/include/asm/kvm_host.h

+1 −0
Original line number Diff line number Diff line
@@ -1127,6 +1127,7 @@ struct kvm_x86_ops { 
	void (*vm_destroy)(struct kvm *kvm);



	/* Create, but do not attach this VCPU */

	int (*vcpu_precreate)(struct kvm *kvm);

	int (*vcpu_create)(struct kvm_vcpu *vcpu);

	void (*vcpu_free)(struct kvm_vcpu *vcpu);

	void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);

arch/x86/include/asm/vmx.h

+8 −0
Original line number Diff line number Diff line
@@ -75,6 +75,11 @@ 
#define SECONDARY_EXEC_TSC_SCALING              VMCS_CONTROL_BIT(TSC_SCALING)

#define SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE	VMCS_CONTROL_BIT(USR_WAIT_PAUSE)



/*

 * Definitions of Tertiary Processor-Based VM-Execution Controls.

 */

#define TERTIARY_EXEC_IPI_VIRT			VMCS_CONTROL_BIT(IPI_VIRT)



#define PIN_BASED_EXT_INTR_MASK                 VMCS_CONTROL_BIT(INTR_EXITING)

#define PIN_BASED_NMI_EXITING                   VMCS_CONTROL_BIT(NMI_EXITING)

#define PIN_BASED_VIRTUAL_NMIS                  VMCS_CONTROL_BIT(VIRTUAL_NMIS)
@@ -157,6 +162,7 @@ static inline int vmx_misc_mseg_revid(u64 vmx_misc) 
enum vmcs_field {

	VIRTUAL_PROCESSOR_ID            = 0x00000000,

	POSTED_INTR_NV                  = 0x00000002,

	LAST_PID_POINTER_INDEX		= 0x00000008,

	GUEST_ES_SELECTOR               = 0x00000800,

	GUEST_CS_SELECTOR               = 0x00000802,

	GUEST_SS_SELECTOR               = 0x00000804,
@@ -222,6 +228,8 @@ enum vmcs_field { 
	TSC_MULTIPLIER_HIGH             = 0x00002033,

	TERTIARY_VM_EXEC_CONTROL	= 0x00002034,

	TERTIARY_VM_EXEC_CONTROL_HIGH	= 0x00002035,

	PID_POINTER_TABLE		= 0x00002042,

	PID_POINTER_TABLE_HIGH		= 0x00002043,

	GUEST_PHYSICAL_ADDRESS          = 0x00002400,

	GUEST_PHYSICAL_ADDRESS_HIGH     = 0x00002401,

	VMCS_LINK_POINTER               = 0x00002800,

arch/x86/include/asm/vmxfeatures.h

+2 −0
Original line number Diff line number Diff line
@@ -85,4 +85,6 @@ 
#define VMX_FEATURE_USR_WAIT_PAUSE	( 2*32+ 26) /* Enable TPAUSE, UMONITOR, UMWAIT in guest */

#define VMX_FEATURE_ENCLV_EXITING	( 2*32+ 28) /* "" VM-Exit on ENCLV (leaf dependent) */



/* Tertiary Processor-Based VM-Execution Controls, word 3 */

#define VMX_FEATURE_IPI_VIRT		( 3*32+  4) /* Enable IPI virtualization */

#endif /* _ASM_X86_VMXFEATURES_H */

arch/x86/kvm/vmx/capabilities.h

+6 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ extern bool __read_mostly enable_unrestricted_guest; 
extern bool __read_mostly enable_ept_ad_bits;

extern bool __read_mostly enable_pml;

extern bool __read_mostly enable_apicv;

extern bool __read_mostly enable_ipiv;

extern int __read_mostly pt_mode;



#define PT_MODE_SYSTEM		0
@@ -279,6 +280,11 @@ static inline bool cpu_has_vmx_apicv(void) 
		cpu_has_vmx_posted_intr();

}



static inline bool cpu_has_vmx_ipiv(void)

{

	return vmcs_config.cpu_based_3rd_exec_ctrl & TERTIARY_EXEC_IPI_VIRT;

}



static inline bool cpu_has_vmx_flexpriority(void)

{

	return cpu_has_vmx_tpr_shadow() &&

arch/x86/kvm/vmx/posted_intr.c

+2 −2
Original line number Diff line number Diff line
@@ -89,7 +89,7 @@ void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu) 
{

	struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);



	if (!vmx_can_use_vtd_pi(vcpu->kvm))

	if (!(vmx_can_use_ipiv(vcpu) || vmx_can_use_vtd_pi(vcpu->kvm)))

		return;



	/* Set SN when the vCPU is preempted */
@@ -147,7 +147,7 @@ int pi_pre_block(struct kvm_vcpu *vcpu) 
	struct pi_desc old, new;

	struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);



	if (!vmx_can_use_vtd_pi(vcpu->kvm))

	if (!(vmx_can_use_ipiv(vcpu) || vmx_can_use_vtd_pi(vcpu->kvm)))

		return 0;



	WARN_ON(irqs_disabled());