Commit c52399be authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: Cavium: Add support for 8k and 32k page sizes. 



Beyond the requirements of the architecture standard Cavium also supports
8k and 32k pages.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Acked-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
parent 740ebe4a

arch/mips/Kconfig

+12 −4
Original line number Diff line number Diff line
@@ -1411,13 +1411,12 @@ config PAGE_SIZE_4KB 


config PAGE_SIZE_8KB

	bool "8kB"

	depends on EXPERIMENTAL && CPU_R8000

	depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON

	help

	  Using 8kB page size will result in higher performance kernel at

	  the price of higher memory consumption.  This option is available

	  only on the R8000 processor.  Not that at the time of this writing

	  this option is still high experimental; there are also issues with

	  compatibility of user applications.

	  only on R8000 and cnMIPS processors.  Note that you will need a

	  suitable Linux distribution to support this.



config PAGE_SIZE_16KB

	bool "16kB"
@@ -1428,6 +1427,15 @@ config PAGE_SIZE_16KB 
	  all non-R3000 family processors.  Note that you will need a suitable

	  Linux distribution to support this.



config PAGE_SIZE_32KB

	bool "32kB"

	depends on CPU_CAVIUM_OCTEON

	help

	  Using 32kB page size will result in higher performance kernel at

	  the price of higher memory consumption.  This option is available

	  only on cnMIPS cores.  Note that you will need a suitable Linux

	  distribution to support this.



config PAGE_SIZE_64KB

	bool "64kB"

	depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX

arch/mips/include/asm/mipsregs.h

+11 −0
Original line number Diff line number Diff line
@@ -184,12 +184,19 @@ 
#else



#define PM_4K		0x00000000

#define PM_8K		0x00002000

#define PM_16K		0x00006000

#define PM_32K		0x0000e000

#define PM_64K		0x0001e000

#define PM_128K		0x0003e000

#define PM_256K		0x0007e000

#define PM_512K		0x000fe000

#define PM_1M		0x001fe000

#define PM_2M		0x003fe000

#define PM_4M		0x007fe000

#define PM_8M		0x00ffe000

#define PM_16M		0x01ffe000

#define PM_32M		0x03ffe000

#define PM_64M		0x07ffe000

#define PM_256M		0x1fffe000

#define PM_1G		0x7fffe000
@@ -201,8 +208,12 @@ 
 */

#ifdef CONFIG_PAGE_SIZE_4KB

#define PM_DEFAULT_MASK	PM_4K

#elif defined(CONFIG_PAGE_SIZE_8KB)

#define PM_DEFAULT_MASK	PM_8K

#elif defined(CONFIG_PAGE_SIZE_16KB)

#define PM_DEFAULT_MASK	PM_16K

#elif defined(CONFIG_PAGE_SIZE_32KB)

#define PM_DEFAULT_MASK	PM_32K

#elif defined(CONFIG_PAGE_SIZE_64KB)

#define PM_DEFAULT_MASK	PM_64K

#else

arch/mips/include/asm/page.h

+3 −0
Original line number Diff line number Diff line
@@ -23,6 +23,9 @@ 
#ifdef CONFIG_PAGE_SIZE_16KB

#define PAGE_SHIFT	14

#endif

#ifdef CONFIG_PAGE_SIZE_32KB

#define PAGE_SHIFT	15

#endif

#ifdef CONFIG_PAGE_SIZE_64KB

#define PAGE_SHIFT	16

#endif

arch/mips/include/asm/pgtable-64.h

+6 −0
Original line number Diff line number Diff line
@@ -83,6 +83,12 @@ 
#define PMD_ORDER		0

#define PTE_ORDER		0

#endif

#ifdef CONFIG_PAGE_SIZE_32KB

#define PGD_ORDER		0

#define PUD_ORDER		aieeee_attempt_to_allocate_pud

#define PMD_ORDER		0

#define PTE_ORDER		0

#endif

#ifdef CONFIG_PAGE_SIZE_64KB

#define PGD_ORDER		0

#define PUD_ORDER		aieeee_attempt_to_allocate_pud

arch/mips/include/asm/thread_info.h

+3 −0
Original line number Diff line number Diff line
@@ -75,6 +75,9 @@ register struct thread_info *__current_thread_info __asm__("$28"); 
#ifdef CONFIG_PAGE_SIZE_16KB

#define THREAD_SIZE_ORDER (0)

#endif

#ifdef CONFIG_PAGE_SIZE_32KB

#define THREAD_SIZE_ORDER (0)

#endif

#ifdef CONFIG_PAGE_SIZE_64KB

#define THREAD_SIZE_ORDER (0)

#endif