Commit c4fc13b5 authored by YuBiao Wang's avatar YuBiao Wang Committed by Alex Deucher
Browse files

drm/amd/amdgpu: Avoid writing GMC registers under sriov in gmc9 



[Why]
For Vega10, disabling gart of gfxhub could mess up KIQ and PSP
under sriov mode, and lead to DMAR on host side.

[How]
Skip writing GMC registers under sriov.

Signed-off-by: default avatarYuBiao Wang <YuBiao.Wang@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e9c76719

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

+4 −0
Original line number Diff line number Diff line
@@ -348,6 +348,10 @@ static void gfxhub_v1_0_gart_disable(struct amdgpu_device *adev) 
		WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL,

				    i * hub->ctx_distance, 0);



	if (amdgpu_sriov_vf(adev))

		/* Avoid write to GMC registers */

		return;



	/* Setup TLB control */

	tmp = RREG32_SOC15(GC, 0, mmMC_VM_MX_L1_TLB_CNTL);

	tmp = REG_SET_FIELD(tmp, MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_TLB, 0);