Loading arch/ia64/mm/ioremap.c +13 −13 Original line number Diff line number Diff line Loading @@ -14,13 +14,13 @@ #include <asm/meminit.h> static inline void __iomem * __ioremap (unsigned long offset, unsigned long size) __ioremap (unsigned long phys_addr, unsigned long size) { return (void __iomem *) (__IA64_UNCACHED_OFFSET | offset); return (void __iomem *) (__IA64_UNCACHED_OFFSET | phys_addr); } void __iomem * ioremap (unsigned long offset, unsigned long size) ioremap (unsigned long phys_addr, unsigned long size) { u64 attr; unsigned long gran_base, gran_size; Loading @@ -30,31 +30,31 @@ ioremap (unsigned long offset, unsigned long size) * as the rest of the kernel. For more details, see * Documentation/ia64/aliasing.txt. */ attr = kern_mem_attribute(offset, size); attr = kern_mem_attribute(phys_addr, size); if (attr & EFI_MEMORY_WB) return (void __iomem *) phys_to_virt(offset); return (void __iomem *) phys_to_virt(phys_addr); else if (attr & EFI_MEMORY_UC) return __ioremap(offset, size); return __ioremap(phys_addr, size); /* * Some chipsets don't support UC access to memory. If * WB is supported for the whole granule, we prefer that. */ gran_base = GRANULEROUNDDOWN(offset); gran_size = GRANULEROUNDUP(offset + size) - gran_base; gran_base = GRANULEROUNDDOWN(phys_addr); gran_size = GRANULEROUNDUP(phys_addr + size) - gran_base; if (efi_mem_attribute(gran_base, gran_size) & EFI_MEMORY_WB) return (void __iomem *) phys_to_virt(offset); return (void __iomem *) phys_to_virt(phys_addr); return __ioremap(offset, size); return __ioremap(phys_addr, size); } EXPORT_SYMBOL(ioremap); void __iomem * ioremap_nocache (unsigned long offset, unsigned long size) ioremap_nocache (unsigned long phys_addr, unsigned long size) { if (kern_mem_attribute(offset, size) & EFI_MEMORY_WB) if (kern_mem_attribute(phys_addr, size) & EFI_MEMORY_WB) return NULL; return __ioremap(offset, size); return __ioremap(phys_addr, size); } EXPORT_SYMBOL(ioremap_nocache); Loading
arch/ia64/mm/ioremap.c +13 −13 Original line number Diff line number Diff line Loading @@ -14,13 +14,13 @@ #include <asm/meminit.h> static inline void __iomem * __ioremap (unsigned long offset, unsigned long size) __ioremap (unsigned long phys_addr, unsigned long size) { return (void __iomem *) (__IA64_UNCACHED_OFFSET | offset); return (void __iomem *) (__IA64_UNCACHED_OFFSET | phys_addr); } void __iomem * ioremap (unsigned long offset, unsigned long size) ioremap (unsigned long phys_addr, unsigned long size) { u64 attr; unsigned long gran_base, gran_size; Loading @@ -30,31 +30,31 @@ ioremap (unsigned long offset, unsigned long size) * as the rest of the kernel. For more details, see * Documentation/ia64/aliasing.txt. */ attr = kern_mem_attribute(offset, size); attr = kern_mem_attribute(phys_addr, size); if (attr & EFI_MEMORY_WB) return (void __iomem *) phys_to_virt(offset); return (void __iomem *) phys_to_virt(phys_addr); else if (attr & EFI_MEMORY_UC) return __ioremap(offset, size); return __ioremap(phys_addr, size); /* * Some chipsets don't support UC access to memory. If * WB is supported for the whole granule, we prefer that. */ gran_base = GRANULEROUNDDOWN(offset); gran_size = GRANULEROUNDUP(offset + size) - gran_base; gran_base = GRANULEROUNDDOWN(phys_addr); gran_size = GRANULEROUNDUP(phys_addr + size) - gran_base; if (efi_mem_attribute(gran_base, gran_size) & EFI_MEMORY_WB) return (void __iomem *) phys_to_virt(offset); return (void __iomem *) phys_to_virt(phys_addr); return __ioremap(offset, size); return __ioremap(phys_addr, size); } EXPORT_SYMBOL(ioremap); void __iomem * ioremap_nocache (unsigned long offset, unsigned long size) ioremap_nocache (unsigned long phys_addr, unsigned long size) { if (kern_mem_attribute(offset, size) & EFI_MEMORY_WB) if (kern_mem_attribute(phys_addr, size) & EFI_MEMORY_WB) return NULL; return __ioremap(offset, size); return __ioremap(phys_addr, size); } EXPORT_SYMBOL(ioremap_nocache);