Commit c4ad4f2e authored by Po-Wen Kao's avatar Po-Wen Kao Committed by Martin K. Petersen
Browse files

scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR 



Quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR is introduced for hosts that implement a
different interrupt topology from the UFSHCI 4.0 spec.  Some hosts raise
per hw queue interrupt in addition to CQES (traditional) when ESI is
disabled.

Enabling this quirk will disable CQES and use only per hw queue interrupt.

Signed-off-by: default avatarPo-Wen Kao <powen.kao@mediatek.com>
Link: https://lore.kernel.org/r/20230612085817.12275-2-powen.kao@mediatek.com


Reviewed-by: default avatarStanley Chu <stanley.chu@mediatek.com>
Reviewed-by: default avatarBart Van Assche <bvanassche@acm.org>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent ccb23dc3

drivers/ufs/core/ufshcd.c

+5 −1
Original line number Diff line number Diff line
@@ -8612,11 +8612,15 @@ static int ufshcd_alloc_mcq(struct ufs_hba *hba) 
static void ufshcd_config_mcq(struct ufs_hba *hba)

{

	int ret;

	u32 intrs;



	ret = ufshcd_mcq_vops_config_esi(hba);

	dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : "");



	ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS);

	intrs = UFSHCD_ENABLE_MCQ_INTRS;

	if (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR)

		intrs &= ~MCQ_CQ_EVENT_STATUS;

	ufshcd_enable_intr(hba, intrs);

	ufshcd_mcq_make_queues_operational(hba);

	ufshcd_mcq_config_mac(hba, hba->nutrs);

include/ufs/ufshcd.h

+7 −0
Original line number Diff line number Diff line
@@ -610,6 +610,13 @@ enum ufshcd_quirks { 
	 * to reinit the device after switching to maximum gear.

	 */

	UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH       = 1 << 19,



	/*

	 * Some host raises interrupt (per queue) in addition to

	 * CQES (traditional) when ESI is disabled.

	 * Enable this quirk will disable CQES and use per queue interrupt.

	 */

	UFSHCD_QUIRK_MCQ_BROKEN_INTR			= 1 << 20,

};



enum ufshcd_caps {