Commit c4909d32 authored by Jack Xu's avatar Jack Xu Committed by Herbert Xu
Browse files

crypto: qat - add wake up event to chip info 



Add the wake up event to chip info since this value will be different
in the next generation of QAT devices.

Signed-off-by: default avatarJack Xu <jack.xu@intel.com>
Co-developed-by: default avatarWojciech Ziemba <wojciech.ziemba@intel.com>
Signed-off-by: default avatarWojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 76735811

drivers/crypto/qat/qat_common/icp_qat_fw_loader_handle.h

+1 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ struct icp_qat_fw_loader_chip_info { 
	u32 icp_rst_csr;

	u32 icp_rst_mask;

	u32 glb_clk_enable_csr;

	u32 wakeup_event_val;

	bool fw_auth;

};

drivers/crypto/qat/qat_common/icp_qat_hal.h

+1 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ enum fcu_sts { 
#define XCWE_VOLUNTARY              (0x1)

#define LCS_STATUS          (0x1)

#define MMC_SHARE_CS_BITPOS         2

#define WAKEUP_EVENT 0x10000

#define FCU_CTRL_AE_POS     0x8

#define FCU_AUTH_STS_MASK   0x7

#define FCU_STS_DONE_POS    0x9

drivers/crypto/qat/qat_common/qat_hal.c

+4 −1
Original line number Diff line number Diff line
@@ -702,6 +702,7 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle, 
		handle->chip_info->lm_size = ICP_QAT_UCLO_MAX_LMEM_REG;

		handle->chip_info->icp_rst_csr = ICP_RESET;

		handle->chip_info->glb_clk_enable_csr = ICP_GLOBAL_CLK_ENABLE;

		handle->chip_info->wakeup_event_val = WAKEUP_EVENT;

		handle->chip_info->fw_auth = true;

		break;

	case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
@@ -711,6 +712,7 @@ static int qat_hal_chip_init(struct icp_qat_fw_loader_handle *handle, 
		handle->chip_info->lm_size = ICP_QAT_UCLO_MAX_LMEM_REG;

		handle->chip_info->icp_rst_csr = ICP_RESET;

		handle->chip_info->glb_clk_enable_csr = ICP_GLOBAL_CLK_ENABLE;

		handle->chip_info->wakeup_event_val = WAKEUP_EVENT;

		handle->chip_info->fw_auth = false;

		break;

	default:
@@ -834,6 +836,7 @@ void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle) 
int qat_hal_start(struct icp_qat_fw_loader_handle *handle)

{

	unsigned long ae_mask = handle->hal_handle->ae_mask;

	u32 wakeup_val = handle->chip_info->wakeup_event_val;

	unsigned int fcu_sts;

	unsigned char ae;

	u32 ae_ctr = 0;
@@ -852,7 +855,7 @@ int qat_hal_start(struct icp_qat_fw_loader_handle *handle) 
		return 0;

	} else {

		for_each_set_bit(ae, &ae_mask, handle->hal_handle->ae_max_num) {

			qat_hal_put_wakeup_event(handle, ae, 0, 0x10000);

			qat_hal_put_wakeup_event(handle, ae, 0, wakeup_val);

			qat_hal_enable_ctx(handle, ae, ICP_QAT_UCLO_AE_ALL_CTX);

			ae_ctr++;

		}