Commit c3c5f044 authored by Hao Lan's avatar Hao Lan Committed by Zheng Zengkai
Browse files

net: hns3: support wake on lan configuration and query 

driver inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I63AH1


CVE: NA

----------------------------------------------------------------------

Implement configuration and query WOL by ethtool and
added the needed device commands and structures to hns3.
Add it do not support suspend resume interface.

Signed-off-by: default avatarHao Lan <lanhao@huawei.com>
Signed-off-by: default avatarJiantao Xiao <xiaojiantao1@h-partners.com>
Reviewed-by: default avatarYue Haibing <yuehaibing@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent dbe740d5

drivers/net/ethernet/hisilicon/hns3/hnae3.h

+12 −0
Original line number Diff line number Diff line
@@ -101,6 +101,7 @@ enum HNAE3_DEV_CAP_BITS { 
	HNAE3_DEV_SUPPORT_MC_MAC_MNG_B,

	HNAE3_DEV_SUPPORT_CQ_B,

	HNAE3_DEV_SUPPORT_LANE_NUM_B,

	HNAE3_DEV_SUPPORT_WOL_B,

};



#define hnae3_ae_dev_fd_supported(ae_dev) \
@@ -166,6 +167,9 @@ enum HNAE3_DEV_CAP_BITS { 
#define hnae3_ae_dev_lane_num_supported(ae_dev) \

	test_bit(HNAE3_DEV_SUPPORT_LANE_NUM_B, (ae_dev)->caps)



#define hnae3_ae_dev_wol_supported(ae_dev) \

	test_bit(HNAE3_DEV_SUPPORT_WOL_B, (ae_dev)->caps)



enum HNAE3_PF_CAP_BITS {

	HNAE3_PF_SUPPORT_VLAN_FLTR_MDF_B = 0,

};
@@ -569,6 +573,10 @@ struct hnae3_ae_dev { 
 *   Get phc info

 * clean_vf_config

 *   Clean residual vf info after disable sriov

 * get_wol

 *   Get wake on lan info

 * set_wol

 *   Config wake on lan

 */

struct hnae3_ae_ops {

	int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
@@ -767,6 +775,10 @@ struct hnae3_ae_ops { 
	void (*clean_vf_config)(struct hnae3_ae_dev *ae_dev, int num_vfs);

	int (*get_dscp_prio)(struct hnae3_handle *handle, u8 dscp,

			     u8 *tc_map_mode, u8 *priority);

	void (*get_wol)(struct hnae3_handle *handle,

			struct ethtool_wolinfo *wol);

	int (*set_wol)(struct hnae3_handle *handle,

		       struct ethtool_wolinfo *wol);

};



struct hnae3_dcb_ops {

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c

+1 −0
Original line number Diff line number Diff line
@@ -154,6 +154,7 @@ static const struct hclge_comm_caps_bit_map hclge_pf_cmd_caps[] = { 
	{HCLGE_COMM_CAP_GRO_B, HNAE3_DEV_SUPPORT_GRO_B},

	{HCLGE_COMM_CAP_FD_B, HNAE3_DEV_SUPPORT_FD_B},

	{HCLGE_COMM_CAP_LANE_NUM_B, HNAE3_DEV_SUPPORT_LANE_NUM_B},

	{HCLGE_COMM_CAP_WOL_B, HNAE3_DEV_SUPPORT_WOL_B},

};



static const struct hclge_comm_caps_bit_map hclge_vf_cmd_caps[] = {

drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h

+3 −0
Original line number Diff line number Diff line
@@ -293,6 +293,8 @@ enum hclge_opcode_type { 
	HCLGE_PPP_CMD0_INT_CMD		= 0x2100,

	HCLGE_PPP_CMD1_INT_CMD		= 0x2101,

	HCLGE_MAC_ETHERTYPE_IDX_RD      = 0x2105,

	HCLGE_OPC_WOL_CFG		= 0x2200,

	HCLGE_OPC_WOL_GET_SUPPORTED_MODE	= 0x2201,

	HCLGE_NCSI_INT_EN		= 0x2401,



	/* ROH MAC commands */
@@ -343,6 +345,7 @@ enum HCLGE_COMM_CAP_BITS { 
	HCLGE_COMM_CAP_GRO_B = 20,

	HCLGE_COMM_CAP_FD_B = 21,

	HCLGE_COMM_CAP_LANE_NUM_B = 27,

	HCLGE_COMM_CAP_WOL_B = 28,

};



enum HCLGE_COMM_API_CAP_BITS {

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

+27 −0
Original line number Diff line number Diff line
@@ -2043,6 +2043,31 @@ static int hns3_get_link_ext_state(struct net_device *netdev, 
	return -ENODATA;

}



static void hns3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)

{

	struct hnae3_handle *handle = hns3_get_handle(netdev);

	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);

	const struct hnae3_ae_ops *ops = handle->ae_algo->ops;



	if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->get_wol)

		return;



	ops->get_wol(handle, wol);

}



static int hns3_set_wol(struct net_device *netdev,

			struct ethtool_wolinfo *wol)

{

	struct hnae3_handle *handle = hns3_get_handle(netdev);

	struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);

	const struct hnae3_ae_ops *ops = handle->ae_algo->ops;



	if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->set_wol)

		return -EOPNOTSUPP;



	return ops->set_wol(handle, wol);

}



static const struct ethtool_ops hns3vf_ethtool_ops = {

	.supported_coalesce_params = HNS3_ETHTOOL_COALESCE,

	.supported_ring_params = HNS3_ETHTOOL_RING,
@@ -2117,6 +2142,8 @@ static const struct ethtool_ops hns3_ethtool_ops = { 
	.set_tunable = hns3_set_tunable,

	.reset = hns3_set_reset,

	.get_link_ext_state = hns3_get_link_ext_state,

	.get_wol = hns3_get_wol,

	.set_wol = hns3_set_wol,

};



void hns3_ethtool_set_ops(struct net_device *netdev)

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h

+24 −0
Original line number Diff line number Diff line
@@ -884,6 +884,30 @@ struct hclge_phy_reg_cmd { 
	u8 rsv1[18];

};



enum HCLGE_WOL_MODE {

	HCLGE_WOL_PHY           = BIT(0),

	HCLGE_WOL_UNICAST       = BIT(1),

	HCLGE_WOL_MULTICAST     = BIT(2),

	HCLGE_WOL_BROADCAST     = BIT(3),

	HCLGE_WOL_ARP           = BIT(4),

	HCLGE_WOL_MAGIC         = BIT(5),

	HCLGE_WOL_MAGICSECURED  = BIT(6),

	HCLGE_WOL_FILTER        = BIT(7),

	HCLGE_WOL_DISABLE       = 0,

};



struct hclge_wol_cfg_cmd {

	__le32 wake_on_lan_mode;

	u8 sopass[SOPASS_MAX];

	u8 sopass_size;

	u8 rsv[13];

};



struct hclge_query_wol_supported_cmd {

	__le32 supported_wake_mode;

	u8 rsv[20];

};



struct hclge_hw;

int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num);

enum hclge_comm_cmd_status hclge_cmd_mdio_write(struct hclge_hw *hw,