Commit c38ec462 authored Aug 20, 2024 by Christophe Leroy Committed by Wen Zhiwei Oct 22, 2024

powerpc/64e: Define mmu_pte_psize static

stable inclusion
from stable-v6.6.51
commit 547acc20e56792dda8a225d125ce4c26b16ae43d
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IAYRVR

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=547acc20e56792dda8a225d125ce4c26b16ae43d



--------------------------------

[ Upstream commit d92b5cc29c792f1d3f0aaa3b29dddfe816c03e88 ]

mmu_pte_psize is only used in the tlb_64e.c, define it static.

Fixes: 25d21ad6 ("powerpc: Add TLB management code for 64-bit Book3E")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202408011256.1O99IB0s-lkp@intel.com/


Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/beb30d280eaa5d857c38a0834b147dffd6b28aa9.1724157750.git.christophe.leroy@csgroup.eu


Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Wen Zhiwei <wenzhiwei@kylinos.cn>

parent e884598d

arch/powerpc/mm/nohash/tlb_64e.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -33,7 +33,7 @@
		* though this will probably be made common with other nohash
		* implementations at some point
		*/
		int mmu_pte_psize; /* Page size used for PTE pages */
		static int mmu_pte_psize; /* Page size used for PTE pages */
		int mmu_vmemmap_psize; /* Page size used for the virtual mem map */
		int book3e_htw_mode; /* HW tablewalk? Value is PPC_HTW_* */
		unsigned long linear_map_top; /* Top of linear mapping */