Unverified Commit c374e875 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'riscv-dt-fixes-for-v6.6-rc3' of... 

Merge tag 'riscv-dt-fixes-for-v6.6-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into arm/fixes

RISC-V Devicetree fixes for v6.6-rc3

Starfive:
A fix for the size of the NOR flash that was causing complaints from the
MTD subsystem during boot & two issues that a certain someone introduced
while resolving merge conflicts. Of the latter, one is a cosmetic
ordering change & the other lead to the usb controller being disabled.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-fixes-for-v6.6-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: visionfive 2: Fix uart0 pins sort order
  riscv: dts: starfive: visionfive 2: Enable usb0
  riscv: dts: starfive: fix NOR flash reserved-data partition size

Link: https://lore.kernel.org/r/20230916-previous-oversold-9d30891ac6cf@spud


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 7d3e4e9d 15582095

arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

+26 −25
Original line number Diff line number Diff line
@@ -262,7 +262,7 @@ 
				reg = <0x100000 0x400000>;

			};

			reserved-data@600000 {

				reg = <0x600000 0x1000000>;

				reg = <0x600000 0xa00000>;

			};

		};

	};
@@ -440,30 +440,6 @@ 
		};

	};



	uart0_pins: uart0-0 {

		tx-pins {

			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,

					     GPOEN_ENABLE,

					     GPI_NONE)>;

			bias-disable;

			drive-strength = <12>;

			input-disable;

			input-schmitt-disable;

			slew-rate = <0>;

		};



		rx-pins {

			pinmux = <GPIOMUX(6, GPOUT_LOW,

					     GPOEN_DISABLE,

					     GPI_SYS_UART0_RX)>;

			bias-disable; /* external pull-up */

			drive-strength = <2>;

			input-enable;

			input-schmitt-enable;

			slew-rate = <0>;

		};

	};



	tdm_pins: tdm-0 {

		tx-pins {

			pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
@@ -497,6 +473,30 @@ 
			input-enable;

		};

	};



	uart0_pins: uart0-0 {

		tx-pins {

			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,

					     GPOEN_ENABLE,

					     GPI_NONE)>;

			bias-disable;

			drive-strength = <12>;

			input-disable;

			input-schmitt-disable;

			slew-rate = <0>;

		};



		rx-pins {

			pinmux = <GPIOMUX(6, GPOUT_LOW,

					     GPOEN_DISABLE,

					     GPI_SYS_UART0_RX)>;

			bias-disable; /* external pull-up */

			drive-strength = <2>;

			input-enable;

			input-schmitt-enable;

			slew-rate = <0>;

		};

	};

};



&tdm {
@@ -513,6 +513,7 @@ 


&usb0 {

	dr_mode = "peripheral";

	status = "okay";

};



&U74_1 {