Loading arch/x86/include/asm/io_apic.h +1 −15 Original line number Diff line number Diff line Loading @@ -114,22 +114,8 @@ struct IR_IO_APIC_route_entry { extern int nr_ioapics; extern int nr_ioapic_registers[MAX_IO_APICS]; /* * MP-BIOS irq configuration table structures: */ #define MP_MAX_IOAPIC_PIN 127 struct mp_config_intsrc { unsigned int mp_dstapic; unsigned char mp_type; unsigned char mp_irqtype; unsigned short mp_irqflag; unsigned char mp_srcbus; unsigned char mp_srcbusirq; unsigned char mp_dstirq; }; /* I/O APIC entries */ extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; Loading @@ -137,7 +123,7 @@ extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; extern int mp_irq_entries; /* MP IRQ source entries */ extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; /* non-0 if default (table-less) MP configuration */ extern int mpc_default_type; Loading arch/x86/kernel/acpi/boot.c +34 −36 Original line number Diff line number Diff line Loading @@ -973,19 +973,19 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) nr_ioapics++; } static void assign_to_mp_irq(struct mp_config_intsrc *m, struct mp_config_intsrc *mp_irq) static void assign_to_mp_irq(struct mpc_intsrc *m, struct mpc_intsrc *mp_irq) { memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); } static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, struct mp_config_intsrc *m) static int mp_irq_cmp(struct mpc_intsrc *mp_irq, struct mpc_intsrc *m) { return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); } static void save_mp_irq(struct mp_config_intsrc *m) static void save_mp_irq(struct mpc_intsrc *m) { int i; Loading @@ -1003,7 +1003,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) { int ioapic; int pin; struct mp_config_intsrc mp_irq; struct mpc_intsrc mp_irq; /* * Convert 'gsi' to 'ioapic.pin'. Loading @@ -1021,13 +1021,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) if ((bus_irq == 0) && (trigger == 3)) trigger = 1; mp_irq.mp_type = MP_INTSRC; mp_irq.mp_irqtype = mp_INT; mp_irq.mp_irqflag = (trigger << 2) | polarity; mp_irq.mp_srcbus = MP_ISA_BUS; mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ mp_irq.mp_dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ mp_irq.mp_dstirq = pin; /* INTIN# */ mp_irq.type = MP_INTSRC; mp_irq.irqtype = mp_INT; mp_irq.irqflag = (trigger << 2) | polarity; mp_irq.srcbus = MP_ISA_BUS; mp_irq.srcbusirq = bus_irq; /* IRQ */ mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ mp_irq.dstirq = pin; /* INTIN# */ save_mp_irq(&mp_irq); } Loading @@ -1037,7 +1037,7 @@ void __init mp_config_acpi_legacy_irqs(void) int i; int ioapic; unsigned int dstapic; struct mp_config_intsrc mp_irq; struct mpc_intsrc mp_irq; #if defined (CONFIG_MCA) || defined (CONFIG_EISA) /* Loading Loading @@ -1072,16 +1072,14 @@ void __init mp_config_acpi_legacy_irqs(void) int idx; for (idx = 0; idx < mp_irq_entries; idx++) { struct mp_config_intsrc *irq = mp_irqs + idx; struct mpc_intsrc *irq = mp_irqs + idx; /* Do we already have a mapping for this ISA IRQ? */ if (irq->mp_srcbus == MP_ISA_BUS && irq->mp_srcbusirq == i) if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) break; /* Do we already have a mapping for this IOAPIC pin */ if (irq->mp_dstapic == dstapic && irq->mp_dstirq == i) if (irq->dstapic == dstapic && irq->dstirq == i) break; } Loading @@ -1090,13 +1088,13 @@ void __init mp_config_acpi_legacy_irqs(void) continue; /* IRQ already used */ } mp_irq.mp_type = MP_INTSRC; mp_irq.mp_irqflag = 0; /* Conforming */ mp_irq.mp_srcbus = MP_ISA_BUS; mp_irq.mp_dstapic = dstapic; mp_irq.mp_irqtype = mp_INT; mp_irq.mp_srcbusirq = i; /* Identity mapped */ mp_irq.mp_dstirq = i; mp_irq.type = MP_INTSRC; mp_irq.irqflag = 0; /* Conforming */ mp_irq.srcbus = MP_ISA_BUS; mp_irq.dstapic = dstapic; mp_irq.irqtype = mp_INT; mp_irq.srcbusirq = i; /* Identity mapped */ mp_irq.dstirq = i; save_mp_irq(&mp_irq); } Loading Loading @@ -1207,22 +1205,22 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, u32 gsi, int triggering, int polarity) { #ifdef CONFIG_X86_MPPARSE struct mp_config_intsrc mp_irq; struct mpc_intsrc mp_irq; int ioapic; if (!acpi_ioapic) return 0; /* print the entry should happen on mptable identically */ mp_irq.mp_type = MP_INTSRC; mp_irq.mp_irqtype = mp_INT; mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | mp_irq.type = MP_INTSRC; mp_irq.irqtype = mp_INT; mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); mp_irq.mp_srcbus = number; mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); mp_irq.srcbus = number; mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); ioapic = mp_find_ioapic(gsi); mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; mp_irq.dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; save_mp_irq(&mp_irq); #endif Loading arch/x86/kernel/io_apic.c +32 −32 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; int nr_ioapics; /* MP IRQ source entries */ struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; /* # of MP IRQ source entries */ int mp_irq_entries; Loading Loading @@ -945,10 +945,10 @@ static int find_irq_entry(int apic, int pin, int type) int i; for (i = 0; i < mp_irq_entries; i++) if (mp_irqs[i].mp_irqtype == type && (mp_irqs[i].mp_dstapic == mp_ioapics[apic].apicid || mp_irqs[i].mp_dstapic == MP_APIC_ALL) && mp_irqs[i].mp_dstirq == pin) if (mp_irqs[i].irqtype == type && (mp_irqs[i].dstapic == mp_ioapics[apic].apicid || mp_irqs[i].dstapic == MP_APIC_ALL) && mp_irqs[i].dstirq == pin) return i; return -1; Loading @@ -962,13 +962,13 @@ static int __init find_isa_irq_pin(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { int lbus = mp_irqs[i].mp_srcbus; int lbus = mp_irqs[i].srcbus; if (test_bit(lbus, mp_bus_not_pci) && (mp_irqs[i].mp_irqtype == type) && (mp_irqs[i].mp_srcbusirq == irq)) (mp_irqs[i].irqtype == type) && (mp_irqs[i].srcbusirq == irq)) return mp_irqs[i].mp_dstirq; return mp_irqs[i].dstirq; } return -1; } Loading @@ -978,17 +978,17 @@ static int __init find_isa_irq_apic(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { int lbus = mp_irqs[i].mp_srcbus; int lbus = mp_irqs[i].srcbus; if (test_bit(lbus, mp_bus_not_pci) && (mp_irqs[i].mp_irqtype == type) && (mp_irqs[i].mp_srcbusirq == irq)) (mp_irqs[i].irqtype == type) && (mp_irqs[i].srcbusirq == irq)) break; } if (i < mp_irq_entries) { int apic; for(apic = 0; apic < nr_ioapics; apic++) { if (mp_ioapics[apic].apicid == mp_irqs[i].mp_dstapic) if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic) return apic; } } Loading @@ -1013,23 +1013,23 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) return -1; } for (i = 0; i < mp_irq_entries; i++) { int lbus = mp_irqs[i].mp_srcbus; int lbus = mp_irqs[i].srcbus; for (apic = 0; apic < nr_ioapics; apic++) if (mp_ioapics[apic].apicid == mp_irqs[i].mp_dstapic || mp_irqs[i].mp_dstapic == MP_APIC_ALL) if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || mp_irqs[i].dstapic == MP_APIC_ALL) break; if (!test_bit(lbus, mp_bus_not_pci) && !mp_irqs[i].mp_irqtype && !mp_irqs[i].irqtype && (bus == lbus) && (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq); (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); if (!(apic || IO_APIC_IRQ(irq))) continue; if (pin == (mp_irqs[i].mp_srcbusirq & 3)) if (pin == (mp_irqs[i].srcbusirq & 3)) return irq; /* * Use the first all-but-pin matching entry as a Loading Loading @@ -1072,7 +1072,7 @@ static int EISA_ELCR(unsigned int irq) * EISA conforming in the MP table, that means its trigger type must * be read in from the ELCR */ #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq)) #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq)) #define default_EISA_polarity(idx) default_ISA_polarity(idx) /* PCI interrupts are always polarity one level triggered, Loading @@ -1089,13 +1089,13 @@ static int EISA_ELCR(unsigned int irq) static int MPBIOS_polarity(int idx) { int bus = mp_irqs[idx].mp_srcbus; int bus = mp_irqs[idx].srcbus; int polarity; /* * Determine IRQ line polarity (high active or low active): */ switch (mp_irqs[idx].mp_irqflag & 3) switch (mp_irqs[idx].irqflag & 3) { case 0: /* conforms, ie. bus-type dependent polarity */ if (test_bit(bus, mp_bus_not_pci)) Loading Loading @@ -1131,13 +1131,13 @@ static int MPBIOS_polarity(int idx) static int MPBIOS_trigger(int idx) { int bus = mp_irqs[idx].mp_srcbus; int bus = mp_irqs[idx].srcbus; int trigger; /* * Determine IRQ trigger mode (edge or level sensitive): */ switch ((mp_irqs[idx].mp_irqflag>>2) & 3) switch ((mp_irqs[idx].irqflag>>2) & 3) { case 0: /* conforms, ie. bus-type dependent */ if (test_bit(bus, mp_bus_not_pci)) Loading Loading @@ -1215,16 +1215,16 @@ int (*ioapic_renumber_irq)(int ioapic, int irq); static int pin_2_irq(int idx, int apic, int pin) { int irq, i; int bus = mp_irqs[idx].mp_srcbus; int bus = mp_irqs[idx].srcbus; /* * Debugging check, we are in big trouble if this message pops up! */ if (mp_irqs[idx].mp_dstirq != pin) if (mp_irqs[idx].dstirq != pin) printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); if (test_bit(bus, mp_bus_not_pci)) { irq = mp_irqs[idx].mp_srcbusirq; irq = mp_irqs[idx].srcbusirq; } else { /* * PCI IRQs are mapped in order Loading Loading @@ -2164,8 +2164,8 @@ static void __init setup_ioapic_ids_from_mpc(void) */ if (old_id != mp_ioapics[apic].apicid) for (i = 0; i < mp_irq_entries; i++) if (mp_irqs[i].mp_dstapic == old_id) mp_irqs[i].mp_dstapic if (mp_irqs[i].dstapic == old_id) mp_irqs[i].dstapic = mp_ioapics[apic].apicid; /* Loading Loading @@ -3983,8 +3983,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) return -1; for (i = 0; i < mp_irq_entries; i++) if (mp_irqs[i].mp_irqtype == mp_INT && mp_irqs[i].mp_srcbusirq == bus_irq) if (mp_irqs[i].irqtype == mp_INT && mp_irqs[i].srcbusirq == bus_irq) break; if (i >= mp_irq_entries) return -1; Loading arch/x86/kernel/mpparse.c +34 −34 Original line number Diff line number Diff line Loading @@ -159,55 +159,55 @@ static void print_MP_intsrc_info(struct mpc_intsrc *m) m->srcbusirq, m->dstapic, m->dstirq); } static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq) static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) { apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," " IRQ %02x, APIC ID %x, APIC INT %02x\n", mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3, (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus, mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq); mp_irq->irqtype, mp_irq->irqflag & 3, (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); } static void __init assign_to_mp_irq(struct mpc_intsrc *m, struct mp_config_intsrc *mp_irq) struct mpc_intsrc *mp_irq) { mp_irq->mp_dstapic = m->dstapic; mp_irq->mp_type = m->type; mp_irq->mp_irqtype = m->irqtype; mp_irq->mp_irqflag = m->irqflag; mp_irq->mp_srcbus = m->srcbus; mp_irq->mp_srcbusirq = m->srcbusirq; mp_irq->mp_dstirq = m->dstirq; mp_irq->dstapic = m->dstapic; mp_irq->type = m->type; mp_irq->irqtype = m->irqtype; mp_irq->irqflag = m->irqflag; mp_irq->srcbus = m->srcbus; mp_irq->srcbusirq = m->srcbusirq; mp_irq->dstirq = m->dstirq; } static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq, static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, struct mpc_intsrc *m) { m->dstapic = mp_irq->mp_dstapic; m->type = mp_irq->mp_type; m->irqtype = mp_irq->mp_irqtype; m->irqflag = mp_irq->mp_irqflag; m->srcbus = mp_irq->mp_srcbus; m->srcbusirq = mp_irq->mp_srcbusirq; m->dstirq = mp_irq->mp_dstirq; m->dstapic = mp_irq->dstapic; m->type = mp_irq->type; m->irqtype = mp_irq->irqtype; m->irqflag = mp_irq->irqflag; m->srcbus = mp_irq->srcbus; m->srcbusirq = mp_irq->srcbusirq; m->dstirq = mp_irq->dstirq; } static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq, static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, struct mpc_intsrc *m) { if (mp_irq->mp_dstapic != m->dstapic) if (mp_irq->dstapic != m->dstapic) return 1; if (mp_irq->mp_type != m->type) if (mp_irq->type != m->type) return 2; if (mp_irq->mp_irqtype != m->irqtype) if (mp_irq->irqtype != m->irqtype) return 3; if (mp_irq->mp_irqflag != m->irqflag) if (mp_irq->irqflag != m->irqflag) return 4; if (mp_irq->mp_srcbus != m->srcbus) if (mp_irq->srcbus != m->srcbus) return 5; if (mp_irq->mp_srcbusirq != m->srcbusirq) if (mp_irq->srcbusirq != m->srcbusirq) return 6; if (mp_irq->mp_dstirq != m->dstirq) if (mp_irq->dstirq != m->dstirq) return 7; return 0; Loading Loading @@ -808,15 +808,15 @@ static int __init get_MP_intsrc_index(struct mpc_intsrc *m) /* not legacy */ for (i = 0; i < mp_irq_entries; i++) { if (mp_irqs[i].mp_irqtype != mp_INT) if (mp_irqs[i].irqtype != mp_INT) continue; if (mp_irqs[i].mp_irqflag != 0x0f) if (mp_irqs[i].irqflag != 0x0f) continue; if (mp_irqs[i].mp_srcbus != m->srcbus) if (mp_irqs[i].srcbus != m->srcbus) continue; if (mp_irqs[i].mp_srcbusirq != m->srcbusirq) if (mp_irqs[i].srcbusirq != m->srcbusirq) continue; if (irq_used[i]) { /* already claimed */ Loading Loading @@ -921,10 +921,10 @@ static int __init replace_intsrc_all(struct mpc_table *mpc, if (irq_used[i]) continue; if (mp_irqs[i].mp_irqtype != mp_INT) if (mp_irqs[i].irqtype != mp_INT) continue; if (mp_irqs[i].mp_irqflag != 0x0f) if (mp_irqs[i].irqflag != 0x0f) continue; if (nr_m_spare > 0) { Loading Loading
arch/x86/include/asm/io_apic.h +1 −15 Original line number Diff line number Diff line Loading @@ -114,22 +114,8 @@ struct IR_IO_APIC_route_entry { extern int nr_ioapics; extern int nr_ioapic_registers[MAX_IO_APICS]; /* * MP-BIOS irq configuration table structures: */ #define MP_MAX_IOAPIC_PIN 127 struct mp_config_intsrc { unsigned int mp_dstapic; unsigned char mp_type; unsigned char mp_irqtype; unsigned short mp_irqflag; unsigned char mp_srcbus; unsigned char mp_srcbusirq; unsigned char mp_dstirq; }; /* I/O APIC entries */ extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; Loading @@ -137,7 +123,7 @@ extern struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; extern int mp_irq_entries; /* MP IRQ source entries */ extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; extern struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; /* non-0 if default (table-less) MP configuration */ extern int mpc_default_type; Loading
arch/x86/kernel/acpi/boot.c +34 −36 Original line number Diff line number Diff line Loading @@ -973,19 +973,19 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) nr_ioapics++; } static void assign_to_mp_irq(struct mp_config_intsrc *m, struct mp_config_intsrc *mp_irq) static void assign_to_mp_irq(struct mpc_intsrc *m, struct mpc_intsrc *mp_irq) { memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); } static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, struct mp_config_intsrc *m) static int mp_irq_cmp(struct mpc_intsrc *mp_irq, struct mpc_intsrc *m) { return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); } static void save_mp_irq(struct mp_config_intsrc *m) static void save_mp_irq(struct mpc_intsrc *m) { int i; Loading @@ -1003,7 +1003,7 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) { int ioapic; int pin; struct mp_config_intsrc mp_irq; struct mpc_intsrc mp_irq; /* * Convert 'gsi' to 'ioapic.pin'. Loading @@ -1021,13 +1021,13 @@ void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) if ((bus_irq == 0) && (trigger == 3)) trigger = 1; mp_irq.mp_type = MP_INTSRC; mp_irq.mp_irqtype = mp_INT; mp_irq.mp_irqflag = (trigger << 2) | polarity; mp_irq.mp_srcbus = MP_ISA_BUS; mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ mp_irq.mp_dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ mp_irq.mp_dstirq = pin; /* INTIN# */ mp_irq.type = MP_INTSRC; mp_irq.irqtype = mp_INT; mp_irq.irqflag = (trigger << 2) | polarity; mp_irq.srcbus = MP_ISA_BUS; mp_irq.srcbusirq = bus_irq; /* IRQ */ mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ mp_irq.dstirq = pin; /* INTIN# */ save_mp_irq(&mp_irq); } Loading @@ -1037,7 +1037,7 @@ void __init mp_config_acpi_legacy_irqs(void) int i; int ioapic; unsigned int dstapic; struct mp_config_intsrc mp_irq; struct mpc_intsrc mp_irq; #if defined (CONFIG_MCA) || defined (CONFIG_EISA) /* Loading Loading @@ -1072,16 +1072,14 @@ void __init mp_config_acpi_legacy_irqs(void) int idx; for (idx = 0; idx < mp_irq_entries; idx++) { struct mp_config_intsrc *irq = mp_irqs + idx; struct mpc_intsrc *irq = mp_irqs + idx; /* Do we already have a mapping for this ISA IRQ? */ if (irq->mp_srcbus == MP_ISA_BUS && irq->mp_srcbusirq == i) if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) break; /* Do we already have a mapping for this IOAPIC pin */ if (irq->mp_dstapic == dstapic && irq->mp_dstirq == i) if (irq->dstapic == dstapic && irq->dstirq == i) break; } Loading @@ -1090,13 +1088,13 @@ void __init mp_config_acpi_legacy_irqs(void) continue; /* IRQ already used */ } mp_irq.mp_type = MP_INTSRC; mp_irq.mp_irqflag = 0; /* Conforming */ mp_irq.mp_srcbus = MP_ISA_BUS; mp_irq.mp_dstapic = dstapic; mp_irq.mp_irqtype = mp_INT; mp_irq.mp_srcbusirq = i; /* Identity mapped */ mp_irq.mp_dstirq = i; mp_irq.type = MP_INTSRC; mp_irq.irqflag = 0; /* Conforming */ mp_irq.srcbus = MP_ISA_BUS; mp_irq.dstapic = dstapic; mp_irq.irqtype = mp_INT; mp_irq.srcbusirq = i; /* Identity mapped */ mp_irq.dstirq = i; save_mp_irq(&mp_irq); } Loading Loading @@ -1207,22 +1205,22 @@ int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, u32 gsi, int triggering, int polarity) { #ifdef CONFIG_X86_MPPARSE struct mp_config_intsrc mp_irq; struct mpc_intsrc mp_irq; int ioapic; if (!acpi_ioapic) return 0; /* print the entry should happen on mptable identically */ mp_irq.mp_type = MP_INTSRC; mp_irq.mp_irqtype = mp_INT; mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | mp_irq.type = MP_INTSRC; mp_irq.irqtype = mp_INT; mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); mp_irq.mp_srcbus = number; mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); mp_irq.srcbus = number; mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); ioapic = mp_find_ioapic(gsi); mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; mp_irq.dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; save_mp_irq(&mp_irq); #endif Loading
arch/x86/kernel/io_apic.c +32 −32 Original line number Diff line number Diff line Loading @@ -87,7 +87,7 @@ struct mpc_ioapic mp_ioapics[MAX_IO_APICS]; int nr_ioapics; /* MP IRQ source entries */ struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; struct mpc_intsrc mp_irqs[MAX_IRQ_SOURCES]; /* # of MP IRQ source entries */ int mp_irq_entries; Loading Loading @@ -945,10 +945,10 @@ static int find_irq_entry(int apic, int pin, int type) int i; for (i = 0; i < mp_irq_entries; i++) if (mp_irqs[i].mp_irqtype == type && (mp_irqs[i].mp_dstapic == mp_ioapics[apic].apicid || mp_irqs[i].mp_dstapic == MP_APIC_ALL) && mp_irqs[i].mp_dstirq == pin) if (mp_irqs[i].irqtype == type && (mp_irqs[i].dstapic == mp_ioapics[apic].apicid || mp_irqs[i].dstapic == MP_APIC_ALL) && mp_irqs[i].dstirq == pin) return i; return -1; Loading @@ -962,13 +962,13 @@ static int __init find_isa_irq_pin(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { int lbus = mp_irqs[i].mp_srcbus; int lbus = mp_irqs[i].srcbus; if (test_bit(lbus, mp_bus_not_pci) && (mp_irqs[i].mp_irqtype == type) && (mp_irqs[i].mp_srcbusirq == irq)) (mp_irqs[i].irqtype == type) && (mp_irqs[i].srcbusirq == irq)) return mp_irqs[i].mp_dstirq; return mp_irqs[i].dstirq; } return -1; } Loading @@ -978,17 +978,17 @@ static int __init find_isa_irq_apic(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { int lbus = mp_irqs[i].mp_srcbus; int lbus = mp_irqs[i].srcbus; if (test_bit(lbus, mp_bus_not_pci) && (mp_irqs[i].mp_irqtype == type) && (mp_irqs[i].mp_srcbusirq == irq)) (mp_irqs[i].irqtype == type) && (mp_irqs[i].srcbusirq == irq)) break; } if (i < mp_irq_entries) { int apic; for(apic = 0; apic < nr_ioapics; apic++) { if (mp_ioapics[apic].apicid == mp_irqs[i].mp_dstapic) if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic) return apic; } } Loading @@ -1013,23 +1013,23 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) return -1; } for (i = 0; i < mp_irq_entries; i++) { int lbus = mp_irqs[i].mp_srcbus; int lbus = mp_irqs[i].srcbus; for (apic = 0; apic < nr_ioapics; apic++) if (mp_ioapics[apic].apicid == mp_irqs[i].mp_dstapic || mp_irqs[i].mp_dstapic == MP_APIC_ALL) if (mp_ioapics[apic].apicid == mp_irqs[i].dstapic || mp_irqs[i].dstapic == MP_APIC_ALL) break; if (!test_bit(lbus, mp_bus_not_pci) && !mp_irqs[i].mp_irqtype && !mp_irqs[i].irqtype && (bus == lbus) && (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq); (slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) { int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq); if (!(apic || IO_APIC_IRQ(irq))) continue; if (pin == (mp_irqs[i].mp_srcbusirq & 3)) if (pin == (mp_irqs[i].srcbusirq & 3)) return irq; /* * Use the first all-but-pin matching entry as a Loading Loading @@ -1072,7 +1072,7 @@ static int EISA_ELCR(unsigned int irq) * EISA conforming in the MP table, that means its trigger type must * be read in from the ELCR */ #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq)) #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq)) #define default_EISA_polarity(idx) default_ISA_polarity(idx) /* PCI interrupts are always polarity one level triggered, Loading @@ -1089,13 +1089,13 @@ static int EISA_ELCR(unsigned int irq) static int MPBIOS_polarity(int idx) { int bus = mp_irqs[idx].mp_srcbus; int bus = mp_irqs[idx].srcbus; int polarity; /* * Determine IRQ line polarity (high active or low active): */ switch (mp_irqs[idx].mp_irqflag & 3) switch (mp_irqs[idx].irqflag & 3) { case 0: /* conforms, ie. bus-type dependent polarity */ if (test_bit(bus, mp_bus_not_pci)) Loading Loading @@ -1131,13 +1131,13 @@ static int MPBIOS_polarity(int idx) static int MPBIOS_trigger(int idx) { int bus = mp_irqs[idx].mp_srcbus; int bus = mp_irqs[idx].srcbus; int trigger; /* * Determine IRQ trigger mode (edge or level sensitive): */ switch ((mp_irqs[idx].mp_irqflag>>2) & 3) switch ((mp_irqs[idx].irqflag>>2) & 3) { case 0: /* conforms, ie. bus-type dependent */ if (test_bit(bus, mp_bus_not_pci)) Loading Loading @@ -1215,16 +1215,16 @@ int (*ioapic_renumber_irq)(int ioapic, int irq); static int pin_2_irq(int idx, int apic, int pin) { int irq, i; int bus = mp_irqs[idx].mp_srcbus; int bus = mp_irqs[idx].srcbus; /* * Debugging check, we are in big trouble if this message pops up! */ if (mp_irqs[idx].mp_dstirq != pin) if (mp_irqs[idx].dstirq != pin) printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); if (test_bit(bus, mp_bus_not_pci)) { irq = mp_irqs[idx].mp_srcbusirq; irq = mp_irqs[idx].srcbusirq; } else { /* * PCI IRQs are mapped in order Loading Loading @@ -2164,8 +2164,8 @@ static void __init setup_ioapic_ids_from_mpc(void) */ if (old_id != mp_ioapics[apic].apicid) for (i = 0; i < mp_irq_entries; i++) if (mp_irqs[i].mp_dstapic == old_id) mp_irqs[i].mp_dstapic if (mp_irqs[i].dstapic == old_id) mp_irqs[i].dstapic = mp_ioapics[apic].apicid; /* Loading Loading @@ -3983,8 +3983,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) return -1; for (i = 0; i < mp_irq_entries; i++) if (mp_irqs[i].mp_irqtype == mp_INT && mp_irqs[i].mp_srcbusirq == bus_irq) if (mp_irqs[i].irqtype == mp_INT && mp_irqs[i].srcbusirq == bus_irq) break; if (i >= mp_irq_entries) return -1; Loading
arch/x86/kernel/mpparse.c +34 −34 Original line number Diff line number Diff line Loading @@ -159,55 +159,55 @@ static void print_MP_intsrc_info(struct mpc_intsrc *m) m->srcbusirq, m->dstapic, m->dstirq); } static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq) static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq) { apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x," " IRQ %02x, APIC ID %x, APIC INT %02x\n", mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3, (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus, mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq); mp_irq->irqtype, mp_irq->irqflag & 3, (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus, mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq); } static void __init assign_to_mp_irq(struct mpc_intsrc *m, struct mp_config_intsrc *mp_irq) struct mpc_intsrc *mp_irq) { mp_irq->mp_dstapic = m->dstapic; mp_irq->mp_type = m->type; mp_irq->mp_irqtype = m->irqtype; mp_irq->mp_irqflag = m->irqflag; mp_irq->mp_srcbus = m->srcbus; mp_irq->mp_srcbusirq = m->srcbusirq; mp_irq->mp_dstirq = m->dstirq; mp_irq->dstapic = m->dstapic; mp_irq->type = m->type; mp_irq->irqtype = m->irqtype; mp_irq->irqflag = m->irqflag; mp_irq->srcbus = m->srcbus; mp_irq->srcbusirq = m->srcbusirq; mp_irq->dstirq = m->dstirq; } static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq, static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq, struct mpc_intsrc *m) { m->dstapic = mp_irq->mp_dstapic; m->type = mp_irq->mp_type; m->irqtype = mp_irq->mp_irqtype; m->irqflag = mp_irq->mp_irqflag; m->srcbus = mp_irq->mp_srcbus; m->srcbusirq = mp_irq->mp_srcbusirq; m->dstirq = mp_irq->mp_dstirq; m->dstapic = mp_irq->dstapic; m->type = mp_irq->type; m->irqtype = mp_irq->irqtype; m->irqflag = mp_irq->irqflag; m->srcbus = mp_irq->srcbus; m->srcbusirq = mp_irq->srcbusirq; m->dstirq = mp_irq->dstirq; } static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq, static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq, struct mpc_intsrc *m) { if (mp_irq->mp_dstapic != m->dstapic) if (mp_irq->dstapic != m->dstapic) return 1; if (mp_irq->mp_type != m->type) if (mp_irq->type != m->type) return 2; if (mp_irq->mp_irqtype != m->irqtype) if (mp_irq->irqtype != m->irqtype) return 3; if (mp_irq->mp_irqflag != m->irqflag) if (mp_irq->irqflag != m->irqflag) return 4; if (mp_irq->mp_srcbus != m->srcbus) if (mp_irq->srcbus != m->srcbus) return 5; if (mp_irq->mp_srcbusirq != m->srcbusirq) if (mp_irq->srcbusirq != m->srcbusirq) return 6; if (mp_irq->mp_dstirq != m->dstirq) if (mp_irq->dstirq != m->dstirq) return 7; return 0; Loading Loading @@ -808,15 +808,15 @@ static int __init get_MP_intsrc_index(struct mpc_intsrc *m) /* not legacy */ for (i = 0; i < mp_irq_entries; i++) { if (mp_irqs[i].mp_irqtype != mp_INT) if (mp_irqs[i].irqtype != mp_INT) continue; if (mp_irqs[i].mp_irqflag != 0x0f) if (mp_irqs[i].irqflag != 0x0f) continue; if (mp_irqs[i].mp_srcbus != m->srcbus) if (mp_irqs[i].srcbus != m->srcbus) continue; if (mp_irqs[i].mp_srcbusirq != m->srcbusirq) if (mp_irqs[i].srcbusirq != m->srcbusirq) continue; if (irq_used[i]) { /* already claimed */ Loading Loading @@ -921,10 +921,10 @@ static int __init replace_intsrc_all(struct mpc_table *mpc, if (irq_used[i]) continue; if (mp_irqs[i].mp_irqtype != mp_INT) if (mp_irqs[i].irqtype != mp_INT) continue; if (mp_irqs[i].mp_irqflag != 0x0f) if (mp_irqs[i].irqflag != 0x0f) continue; if (nr_m_spare > 0) { Loading