Commit c290d09a authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Shawn Guo
Browse files

arm64: dts: freescale: add missing cache properties 



As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  fsl-ls2080a-simu.dtb: l2-cache3: 'cache-unified' is a required property

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent d2bd9471

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ 
		l2: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -85,6 +85,7 @@ 
		l2: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ 
		l2: l2-cache {

			compatible = "cache";

			cache-level = <2>;

			cache-unified;

		};

	};

arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -96,21 +96,25 @@ 
	cluster0_l2: l2-cache0 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	cluster1_l2: l2-cache1 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	cluster2_l2: l2-cache2 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	cluster3_l2: l2-cache3 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	CPU_PW20: cpu-pw20 {

arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -96,21 +96,25 @@ 
	cluster0_l2: l2-cache0 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	cluster1_l2: l2-cache1 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	cluster2_l2: l2-cache2 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	cluster3_l2: l2-cache3 {

		compatible = "cache";

		cache-level = <2>;

		cache-unified;

	};



	CPU_PW20: cpu-pw20 {