Loading arch/x86/include/asm/ds.h +139 −102 Original line number Diff line number Diff line Loading @@ -6,13 +6,13 @@ * precise-event based sampling (PEBS). * * It manages: * - per-thread and per-cpu allocation of BTS and PEBS * - DS and BTS hardware configuration * - buffer overflow handling (to be done) * - buffer access * * It assumes: * - get_task_struct on all traced tasks * - current is allowed to trace tasks * It does not do: * - security checking (is the caller allowed to trace the task) * - buffer allocation (memory accounting) * * * Copyright (C) 2007-2008 Intel Corporation. Loading @@ -31,6 +31,7 @@ #ifdef CONFIG_X86_DS struct task_struct; struct ds_context; struct ds_tracer; struct bts_tracer; struct pebs_tracer; Loading @@ -38,6 +39,38 @@ struct pebs_tracer; typedef void (*bts_ovfl_callback_t)(struct bts_tracer *); typedef void (*pebs_ovfl_callback_t)(struct pebs_tracer *); /* * A list of features plus corresponding macros to talk about them in * the ds_request function's flags parameter. * * We use the enum to index an array of corresponding control bits; * we use the macro to index a flags bit-vector. */ enum ds_feature { dsf_bts = 0, dsf_bts_kernel, #define BTS_KERNEL (1 << dsf_bts_kernel) /* trace kernel-mode branches */ dsf_bts_user, #define BTS_USER (1 << dsf_bts_user) /* trace user-mode branches */ dsf_bts_overflow, dsf_bts_max, dsf_pebs = dsf_bts_max, dsf_pebs_max, dsf_ctl_max = dsf_pebs_max, dsf_bts_timestamps = dsf_ctl_max, #define BTS_TIMESTAMPS (1 << dsf_bts_timestamps) /* add timestamps into BTS trace */ #define BTS_USER_FLAGS (BTS_KERNEL | BTS_USER | BTS_TIMESTAMPS) }; /* * Request BTS or PEBS * Loading @@ -58,92 +91,135 @@ typedef void (*pebs_ovfl_callback_t)(struct pebs_tracer *); * NULL if cyclic buffer requested * th: the interrupt threshold in records from the end of the buffer; * -1 if no interrupt threshold is requested. * flags: a bit-mask of the above flags */ extern struct bts_tracer *ds_request_bts(struct task_struct *task, void *base, size_t size, bts_ovfl_callback_t ovfl, size_t th); bts_ovfl_callback_t ovfl, size_t th, unsigned int flags); extern struct pebs_tracer *ds_request_pebs(struct task_struct *task, void *base, size_t size, pebs_ovfl_callback_t ovfl, size_t th); size_t th, unsigned int flags); /* * Release BTS or PEBS resources * * Returns 0 on success; -Eerrno otherwise * Suspend and resume BTS or PEBS tracing * * tracer: the tracer handle returned from ds_request_~() */ extern int ds_release_bts(struct bts_tracer *tracer); extern int ds_release_pebs(struct pebs_tracer *tracer); extern void ds_release_bts(struct bts_tracer *tracer); extern void ds_suspend_bts(struct bts_tracer *tracer); extern void ds_resume_bts(struct bts_tracer *tracer); extern void ds_release_pebs(struct pebs_tracer *tracer); extern void ds_suspend_pebs(struct pebs_tracer *tracer); extern void ds_resume_pebs(struct pebs_tracer *tracer); /* * Get the (array) index of the write pointer. * (assuming an array of BTS/PEBS records) * * Returns 0 on success; -Eerrno on error * The raw DS buffer state as it is used for BTS and PEBS recording. * * tracer: the tracer handle returned from ds_request_~() * pos (out): will hold the result * This is the low-level, arch-dependent interface for working * directly on the raw trace data. */ extern int ds_get_bts_index(struct bts_tracer *tracer, size_t *pos); extern int ds_get_pebs_index(struct pebs_tracer *tracer, size_t *pos); struct ds_trace { /* the number of bts/pebs records */ size_t n; /* the size of a bts/pebs record in bytes */ size_t size; /* pointers into the raw buffer: - to the first entry */ void *begin; /* - one beyond the last entry */ void *end; /* - one beyond the newest entry */ void *top; /* - the interrupt threshold */ void *ith; /* flags given on ds_request() */ unsigned int flags; }; /* * Get the (array) index one record beyond the end of the array. * (assuming an array of BTS/PEBS records) * * Returns 0 on success; -Eerrno on error * * tracer: the tracer handle returned from ds_request_~() * pos (out): will hold the result * An arch-independent view on branch trace data. */ extern int ds_get_bts_end(struct bts_tracer *tracer, size_t *pos); extern int ds_get_pebs_end(struct pebs_tracer *tracer, size_t *pos); enum bts_qualifier { bts_invalid, #define BTS_INVALID bts_invalid bts_branch, #define BTS_BRANCH bts_branch bts_task_arrives, #define BTS_TASK_ARRIVES bts_task_arrives bts_task_departs, #define BTS_TASK_DEPARTS bts_task_departs bts_qual_bit_size = 4, bts_qual_max = (1 << bts_qual_bit_size), }; struct bts_struct { __u64 qualifier; union { /* BTS_BRANCH */ struct { __u64 from; __u64 to; } lbr; /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */ struct { __u64 jiffies; pid_t pid; } timestamp; } variant; }; /* * Provide a pointer to the BTS/PEBS record at parameter index. * (assuming an array of BTS/PEBS records) * * The pointer points directly into the buffer. The user is * responsible for copying the record. * * Returns the size of a single record on success; -Eerrno on error * The BTS state. * * tracer: the tracer handle returned from ds_request_~() * index: the index of the requested record * record (out): pointer to the requested record * This gives access to the raw DS state and adds functions to provide * an arch-independent view of the BTS data. */ extern int ds_access_bts(struct bts_tracer *tracer, size_t index, const void **record); extern int ds_access_pebs(struct pebs_tracer *tracer, size_t index, const void **record); struct bts_trace { struct ds_trace ds; int (*read)(struct bts_tracer *tracer, const void *at, struct bts_struct *out); int (*write)(struct bts_tracer *tracer, const struct bts_struct *in); }; /* * Write one or more BTS/PEBS records at the write pointer index and * advance the write pointer. * The PEBS state. * * If size is not a multiple of the record size, trailing bytes are * zeroed out. * * May result in one or more overflow notifications. * * If called during overflow handling, that is, with index >= * interrupt threshold, the write will wrap around. * This gives access to the raw DS state and the PEBS-specific counter * reset value. */ struct pebs_trace { struct ds_trace ds; /* the PEBS reset value */ unsigned long long reset_value; }; /* * Read the BTS or PEBS trace. * * An overflow notification is given if and when the interrupt * threshold is reached during or after the write. * Returns a view on the trace collected for the parameter tracer. * * Returns the number of bytes written or -Eerrno. * The view remains valid as long as the traced task is not running or * the tracer is suspended. * Writes into the trace buffer are not reflected. * * tracer: the tracer handle returned from ds_request_~() * buffer: the buffer to write * size: the size of the buffer */ extern int ds_write_bts(struct bts_tracer *tracer, const void *buffer, size_t size); extern int ds_write_pebs(struct pebs_tracer *tracer, const void *buffer, size_t size); extern const struct bts_trace *ds_read_bts(struct bts_tracer *tracer); extern const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer); /* * Reset the write pointer of the BTS/PEBS buffer. Loading @@ -155,27 +231,6 @@ extern int ds_write_pebs(struct pebs_tracer *tracer, extern int ds_reset_bts(struct bts_tracer *tracer); extern int ds_reset_pebs(struct pebs_tracer *tracer); /* * Clear the BTS/PEBS buffer and reset the write pointer. * The entire buffer will be zeroed out. * * Returns 0 on success; -Eerrno on error * * tracer: the tracer handle returned from ds_request_~() */ extern int ds_clear_bts(struct bts_tracer *tracer); extern int ds_clear_pebs(struct pebs_tracer *tracer); /* * Provide the PEBS counter reset value. * * Returns 0 on success; -Eerrno on error * * tracer: the tracer handle returned from ds_request_pebs() * value (out): the counter reset value */ extern int ds_get_pebs_reset(struct pebs_tracer *tracer, u64 *value); /* * Set the PEBS counter reset value. * Loading @@ -192,35 +247,17 @@ extern int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value); struct cpuinfo_x86; extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *); /* * The DS context - part of struct thread_struct. * Context switch work */ #define MAX_SIZEOF_DS (12 * 8) struct ds_context { /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */ unsigned char ds[MAX_SIZEOF_DS]; /* the owner of the BTS and PEBS configuration, respectively */ struct ds_tracer *owner[2]; /* use count */ unsigned long count; /* a pointer to the context location inside the thread_struct * or the per_cpu context array */ struct ds_context **this; /* a pointer to the task owning this context, or NULL, if the * context is owned by a cpu */ struct task_struct *task; }; /* called by exit_thread() to free leftover contexts */ extern void ds_free(struct ds_context *context); extern void ds_switch_to(struct task_struct *prev, struct task_struct *next); #else /* CONFIG_X86_DS */ struct cpuinfo_x86; static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {} static inline void ds_switch_to(struct task_struct *prev, struct task_struct *next) {} #endif /* CONFIG_X86_DS */ #endif /* _ASM_X86_DS_H */ arch/x86/include/asm/processor.h +13 −0 Original line number Diff line number Diff line Loading @@ -752,6 +752,19 @@ extern void switch_to_new_gdt(void); extern void cpu_init(void); extern void init_gdt(int cpu); static inline unsigned long get_debugctlmsr(void) { unsigned long debugctlmsr = 0; #ifndef CONFIG_X86_DEBUGCTLMSR if (boot_cpu_data.x86 < 6) return 0; #endif rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); return debugctlmsr; } static inline void update_debugctlmsr(unsigned long debugctlmsr) { #ifndef CONFIG_X86_DEBUGCTLMSR Loading arch/x86/include/asm/ptrace.h +0 −36 Original line number Diff line number Diff line Loading @@ -6,7 +6,6 @@ #include <asm/processor-flags.h> #ifdef __KERNEL__ #include <asm/ds.h> /* the DS BTS struct is used for ptrace too */ #include <asm/segment.h> #endif Loading Loading @@ -128,34 +127,6 @@ struct pt_regs { #endif /* !__i386__ */ #ifdef CONFIG_X86_PTRACE_BTS /* a branch trace record entry * * In order to unify the interface between various processor versions, * we use the below data structure for all processors. */ enum bts_qualifier { BTS_INVALID = 0, BTS_BRANCH, BTS_TASK_ARRIVES, BTS_TASK_DEPARTS }; struct bts_struct { __u64 qualifier; union { /* BTS_BRANCH */ struct { __u64 from_ip; __u64 to_ip; } lbr; /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */ __u64 jiffies; } variant; }; #endif /* CONFIG_X86_PTRACE_BTS */ #ifdef __KERNEL__ #include <linux/init.h> Loading @@ -163,13 +134,6 @@ struct bts_struct { struct cpuinfo_x86; struct task_struct; #ifdef CONFIG_X86_PTRACE_BTS extern void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *); extern void ptrace_bts_take_timestamp(struct task_struct *, enum bts_qualifier); #else #define ptrace_bts_init_intel(config) do {} while (0) #endif /* CONFIG_X86_PTRACE_BTS */ extern unsigned long profile_pc(struct pt_regs *regs); extern unsigned long Loading arch/x86/include/asm/thread_info.h +1 −4 Original line number Diff line number Diff line Loading @@ -93,7 +93,6 @@ struct thread_info { #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ #define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ #define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */ #define TIF_BTS_TRACE_TS 27 /* record scheduling event timestamps */ #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) Loading @@ -115,7 +114,6 @@ struct thread_info { #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) #define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) #define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) #define _TIF_BTS_TRACE_TS (1 << TIF_BTS_TRACE_TS) /* work to do in syscall_trace_enter() */ #define _TIF_WORK_SYSCALL_ENTRY \ Loading @@ -141,8 +139,7 @@ struct thread_info { /* flags to check in __switch_to() */ #define _TIF_WORK_CTXSW \ (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_BTS_TRACE_TS| \ _TIF_NOTSC) (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_NOTSC) #define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG) Loading arch/x86/kernel/cpu/intel.c +0 −4 Original line number Diff line number Diff line Loading @@ -11,7 +11,6 @@ #include <asm/pgtable.h> #include <asm/msr.h> #include <asm/uaccess.h> #include <asm/ptrace.h> #include <asm/ds.h> #include <asm/bugs.h> Loading Loading @@ -309,9 +308,6 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_P3); #endif if (cpu_has_bts) ptrace_bts_init_intel(c); detect_extended_topology(c); if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { /* Loading Loading
arch/x86/include/asm/ds.h +139 −102 Original line number Diff line number Diff line Loading @@ -6,13 +6,13 @@ * precise-event based sampling (PEBS). * * It manages: * - per-thread and per-cpu allocation of BTS and PEBS * - DS and BTS hardware configuration * - buffer overflow handling (to be done) * - buffer access * * It assumes: * - get_task_struct on all traced tasks * - current is allowed to trace tasks * It does not do: * - security checking (is the caller allowed to trace the task) * - buffer allocation (memory accounting) * * * Copyright (C) 2007-2008 Intel Corporation. Loading @@ -31,6 +31,7 @@ #ifdef CONFIG_X86_DS struct task_struct; struct ds_context; struct ds_tracer; struct bts_tracer; struct pebs_tracer; Loading @@ -38,6 +39,38 @@ struct pebs_tracer; typedef void (*bts_ovfl_callback_t)(struct bts_tracer *); typedef void (*pebs_ovfl_callback_t)(struct pebs_tracer *); /* * A list of features plus corresponding macros to talk about them in * the ds_request function's flags parameter. * * We use the enum to index an array of corresponding control bits; * we use the macro to index a flags bit-vector. */ enum ds_feature { dsf_bts = 0, dsf_bts_kernel, #define BTS_KERNEL (1 << dsf_bts_kernel) /* trace kernel-mode branches */ dsf_bts_user, #define BTS_USER (1 << dsf_bts_user) /* trace user-mode branches */ dsf_bts_overflow, dsf_bts_max, dsf_pebs = dsf_bts_max, dsf_pebs_max, dsf_ctl_max = dsf_pebs_max, dsf_bts_timestamps = dsf_ctl_max, #define BTS_TIMESTAMPS (1 << dsf_bts_timestamps) /* add timestamps into BTS trace */ #define BTS_USER_FLAGS (BTS_KERNEL | BTS_USER | BTS_TIMESTAMPS) }; /* * Request BTS or PEBS * Loading @@ -58,92 +91,135 @@ typedef void (*pebs_ovfl_callback_t)(struct pebs_tracer *); * NULL if cyclic buffer requested * th: the interrupt threshold in records from the end of the buffer; * -1 if no interrupt threshold is requested. * flags: a bit-mask of the above flags */ extern struct bts_tracer *ds_request_bts(struct task_struct *task, void *base, size_t size, bts_ovfl_callback_t ovfl, size_t th); bts_ovfl_callback_t ovfl, size_t th, unsigned int flags); extern struct pebs_tracer *ds_request_pebs(struct task_struct *task, void *base, size_t size, pebs_ovfl_callback_t ovfl, size_t th); size_t th, unsigned int flags); /* * Release BTS or PEBS resources * * Returns 0 on success; -Eerrno otherwise * Suspend and resume BTS or PEBS tracing * * tracer: the tracer handle returned from ds_request_~() */ extern int ds_release_bts(struct bts_tracer *tracer); extern int ds_release_pebs(struct pebs_tracer *tracer); extern void ds_release_bts(struct bts_tracer *tracer); extern void ds_suspend_bts(struct bts_tracer *tracer); extern void ds_resume_bts(struct bts_tracer *tracer); extern void ds_release_pebs(struct pebs_tracer *tracer); extern void ds_suspend_pebs(struct pebs_tracer *tracer); extern void ds_resume_pebs(struct pebs_tracer *tracer); /* * Get the (array) index of the write pointer. * (assuming an array of BTS/PEBS records) * * Returns 0 on success; -Eerrno on error * The raw DS buffer state as it is used for BTS and PEBS recording. * * tracer: the tracer handle returned from ds_request_~() * pos (out): will hold the result * This is the low-level, arch-dependent interface for working * directly on the raw trace data. */ extern int ds_get_bts_index(struct bts_tracer *tracer, size_t *pos); extern int ds_get_pebs_index(struct pebs_tracer *tracer, size_t *pos); struct ds_trace { /* the number of bts/pebs records */ size_t n; /* the size of a bts/pebs record in bytes */ size_t size; /* pointers into the raw buffer: - to the first entry */ void *begin; /* - one beyond the last entry */ void *end; /* - one beyond the newest entry */ void *top; /* - the interrupt threshold */ void *ith; /* flags given on ds_request() */ unsigned int flags; }; /* * Get the (array) index one record beyond the end of the array. * (assuming an array of BTS/PEBS records) * * Returns 0 on success; -Eerrno on error * * tracer: the tracer handle returned from ds_request_~() * pos (out): will hold the result * An arch-independent view on branch trace data. */ extern int ds_get_bts_end(struct bts_tracer *tracer, size_t *pos); extern int ds_get_pebs_end(struct pebs_tracer *tracer, size_t *pos); enum bts_qualifier { bts_invalid, #define BTS_INVALID bts_invalid bts_branch, #define BTS_BRANCH bts_branch bts_task_arrives, #define BTS_TASK_ARRIVES bts_task_arrives bts_task_departs, #define BTS_TASK_DEPARTS bts_task_departs bts_qual_bit_size = 4, bts_qual_max = (1 << bts_qual_bit_size), }; struct bts_struct { __u64 qualifier; union { /* BTS_BRANCH */ struct { __u64 from; __u64 to; } lbr; /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */ struct { __u64 jiffies; pid_t pid; } timestamp; } variant; }; /* * Provide a pointer to the BTS/PEBS record at parameter index. * (assuming an array of BTS/PEBS records) * * The pointer points directly into the buffer. The user is * responsible for copying the record. * * Returns the size of a single record on success; -Eerrno on error * The BTS state. * * tracer: the tracer handle returned from ds_request_~() * index: the index of the requested record * record (out): pointer to the requested record * This gives access to the raw DS state and adds functions to provide * an arch-independent view of the BTS data. */ extern int ds_access_bts(struct bts_tracer *tracer, size_t index, const void **record); extern int ds_access_pebs(struct pebs_tracer *tracer, size_t index, const void **record); struct bts_trace { struct ds_trace ds; int (*read)(struct bts_tracer *tracer, const void *at, struct bts_struct *out); int (*write)(struct bts_tracer *tracer, const struct bts_struct *in); }; /* * Write one or more BTS/PEBS records at the write pointer index and * advance the write pointer. * The PEBS state. * * If size is not a multiple of the record size, trailing bytes are * zeroed out. * * May result in one or more overflow notifications. * * If called during overflow handling, that is, with index >= * interrupt threshold, the write will wrap around. * This gives access to the raw DS state and the PEBS-specific counter * reset value. */ struct pebs_trace { struct ds_trace ds; /* the PEBS reset value */ unsigned long long reset_value; }; /* * Read the BTS or PEBS trace. * * An overflow notification is given if and when the interrupt * threshold is reached during or after the write. * Returns a view on the trace collected for the parameter tracer. * * Returns the number of bytes written or -Eerrno. * The view remains valid as long as the traced task is not running or * the tracer is suspended. * Writes into the trace buffer are not reflected. * * tracer: the tracer handle returned from ds_request_~() * buffer: the buffer to write * size: the size of the buffer */ extern int ds_write_bts(struct bts_tracer *tracer, const void *buffer, size_t size); extern int ds_write_pebs(struct pebs_tracer *tracer, const void *buffer, size_t size); extern const struct bts_trace *ds_read_bts(struct bts_tracer *tracer); extern const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer); /* * Reset the write pointer of the BTS/PEBS buffer. Loading @@ -155,27 +231,6 @@ extern int ds_write_pebs(struct pebs_tracer *tracer, extern int ds_reset_bts(struct bts_tracer *tracer); extern int ds_reset_pebs(struct pebs_tracer *tracer); /* * Clear the BTS/PEBS buffer and reset the write pointer. * The entire buffer will be zeroed out. * * Returns 0 on success; -Eerrno on error * * tracer: the tracer handle returned from ds_request_~() */ extern int ds_clear_bts(struct bts_tracer *tracer); extern int ds_clear_pebs(struct pebs_tracer *tracer); /* * Provide the PEBS counter reset value. * * Returns 0 on success; -Eerrno on error * * tracer: the tracer handle returned from ds_request_pebs() * value (out): the counter reset value */ extern int ds_get_pebs_reset(struct pebs_tracer *tracer, u64 *value); /* * Set the PEBS counter reset value. * Loading @@ -192,35 +247,17 @@ extern int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value); struct cpuinfo_x86; extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *); /* * The DS context - part of struct thread_struct. * Context switch work */ #define MAX_SIZEOF_DS (12 * 8) struct ds_context { /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */ unsigned char ds[MAX_SIZEOF_DS]; /* the owner of the BTS and PEBS configuration, respectively */ struct ds_tracer *owner[2]; /* use count */ unsigned long count; /* a pointer to the context location inside the thread_struct * or the per_cpu context array */ struct ds_context **this; /* a pointer to the task owning this context, or NULL, if the * context is owned by a cpu */ struct task_struct *task; }; /* called by exit_thread() to free leftover contexts */ extern void ds_free(struct ds_context *context); extern void ds_switch_to(struct task_struct *prev, struct task_struct *next); #else /* CONFIG_X86_DS */ struct cpuinfo_x86; static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {} static inline void ds_switch_to(struct task_struct *prev, struct task_struct *next) {} #endif /* CONFIG_X86_DS */ #endif /* _ASM_X86_DS_H */
arch/x86/include/asm/processor.h +13 −0 Original line number Diff line number Diff line Loading @@ -752,6 +752,19 @@ extern void switch_to_new_gdt(void); extern void cpu_init(void); extern void init_gdt(int cpu); static inline unsigned long get_debugctlmsr(void) { unsigned long debugctlmsr = 0; #ifndef CONFIG_X86_DEBUGCTLMSR if (boot_cpu_data.x86 < 6) return 0; #endif rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); return debugctlmsr; } static inline void update_debugctlmsr(unsigned long debugctlmsr) { #ifndef CONFIG_X86_DEBUGCTLMSR Loading
arch/x86/include/asm/ptrace.h +0 −36 Original line number Diff line number Diff line Loading @@ -6,7 +6,6 @@ #include <asm/processor-flags.h> #ifdef __KERNEL__ #include <asm/ds.h> /* the DS BTS struct is used for ptrace too */ #include <asm/segment.h> #endif Loading Loading @@ -128,34 +127,6 @@ struct pt_regs { #endif /* !__i386__ */ #ifdef CONFIG_X86_PTRACE_BTS /* a branch trace record entry * * In order to unify the interface between various processor versions, * we use the below data structure for all processors. */ enum bts_qualifier { BTS_INVALID = 0, BTS_BRANCH, BTS_TASK_ARRIVES, BTS_TASK_DEPARTS }; struct bts_struct { __u64 qualifier; union { /* BTS_BRANCH */ struct { __u64 from_ip; __u64 to_ip; } lbr; /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */ __u64 jiffies; } variant; }; #endif /* CONFIG_X86_PTRACE_BTS */ #ifdef __KERNEL__ #include <linux/init.h> Loading @@ -163,13 +134,6 @@ struct bts_struct { struct cpuinfo_x86; struct task_struct; #ifdef CONFIG_X86_PTRACE_BTS extern void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *); extern void ptrace_bts_take_timestamp(struct task_struct *, enum bts_qualifier); #else #define ptrace_bts_init_intel(config) do {} while (0) #endif /* CONFIG_X86_PTRACE_BTS */ extern unsigned long profile_pc(struct pt_regs *regs); extern unsigned long Loading
arch/x86/include/asm/thread_info.h +1 −4 Original line number Diff line number Diff line Loading @@ -93,7 +93,6 @@ struct thread_info { #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ #define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ #define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */ #define TIF_BTS_TRACE_TS 27 /* record scheduling event timestamps */ #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) Loading @@ -115,7 +114,6 @@ struct thread_info { #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) #define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) #define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) #define _TIF_BTS_TRACE_TS (1 << TIF_BTS_TRACE_TS) /* work to do in syscall_trace_enter() */ #define _TIF_WORK_SYSCALL_ENTRY \ Loading @@ -141,8 +139,7 @@ struct thread_info { /* flags to check in __switch_to() */ #define _TIF_WORK_CTXSW \ (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_BTS_TRACE_TS| \ _TIF_NOTSC) (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_NOTSC) #define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG) Loading
arch/x86/kernel/cpu/intel.c +0 −4 Original line number Diff line number Diff line Loading @@ -11,7 +11,6 @@ #include <asm/pgtable.h> #include <asm/msr.h> #include <asm/uaccess.h> #include <asm/ptrace.h> #include <asm/ds.h> #include <asm/bugs.h> Loading Loading @@ -309,9 +308,6 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) set_cpu_cap(c, X86_FEATURE_P3); #endif if (cpu_has_bts) ptrace_bts_init_intel(c); detect_extended_topology(c); if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) { /* Loading